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| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: Freescale i.MX General Power Controller v2 |
| 8 | + |
| 9 | +maintainers: |
| 10 | + - Andrey Smirnov <[email protected]> |
| 11 | + |
| 12 | +description: | |
| 13 | + The i.MX7S/D General Power Control (GPC) block contains Power Gating |
| 14 | + Control (PGC) for various power domains. |
| 15 | +
|
| 16 | + Power domains contained within GPC node are generic power domain |
| 17 | + providers, documented in |
| 18 | + Documentation/devicetree/bindings/power/power-domain.yaml, which are |
| 19 | + described as subnodes of the power gating controller 'pgc' node. |
| 20 | +
|
| 21 | + IP cores belonging to a power domain should contain a 'power-domains' |
| 22 | + property that is a phandle for PGC node representing the domain. |
| 23 | +
|
| 24 | +properties: |
| 25 | + compatible: |
| 26 | + enum: |
| 27 | + - fsl,imx7d-gpc |
| 28 | + - fsl,imx8mq-gpc |
| 29 | + |
| 30 | + reg: |
| 31 | + maxItems: 1 |
| 32 | + |
| 33 | + interrupts: |
| 34 | + maxItems: 1 |
| 35 | + |
| 36 | + pgc: |
| 37 | + type: object |
| 38 | + description: list of power domains provided by this controller. |
| 39 | + |
| 40 | + patternProperties: |
| 41 | + "power-domain@[0-9]$": |
| 42 | + type: object |
| 43 | + properties: |
| 44 | + |
| 45 | + '#power-domain-cells': |
| 46 | + const: 0 |
| 47 | + |
| 48 | + reg: |
| 49 | + description: | |
| 50 | + Power domain index. Valid values are defined in |
| 51 | + include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc and |
| 52 | + include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc |
| 53 | + maxItems: 1 |
| 54 | + |
| 55 | + clocks: |
| 56 | + description: | |
| 57 | + A number of phandles to clocks that need to be enabled during domain |
| 58 | + power-up sequencing to ensure reset propagation into devices located |
| 59 | + inside this power domain. |
| 60 | + minItems: 1 |
| 61 | + maxItems: 5 |
| 62 | + |
| 63 | + power-supply: true |
| 64 | + |
| 65 | + required: |
| 66 | + - '#power-domain-cells' |
| 67 | + - reg |
| 68 | + |
| 69 | +required: |
| 70 | + - compatible |
| 71 | + - reg |
| 72 | + - interrupts |
| 73 | + - pgc |
| 74 | + |
| 75 | +additionalProperties: false |
| 76 | + |
| 77 | +examples: |
| 78 | + - | |
| 79 | + #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 80 | +
|
| 81 | + gpc@303a0000 { |
| 82 | + compatible = "fsl,imx7d-gpc"; |
| 83 | + reg = <0x303a0000 0x1000>; |
| 84 | + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; |
| 85 | +
|
| 86 | + pgc { |
| 87 | + #address-cells = <1>; |
| 88 | + #size-cells = <0>; |
| 89 | +
|
| 90 | + pgc_mipi_phy: power-domain@0 { |
| 91 | + #power-domain-cells = <0>; |
| 92 | + reg = <0>; |
| 93 | + power-supply = <®_1p0d>; |
| 94 | + }; |
| 95 | +
|
| 96 | + pgc_pcie_phy: power-domain@1 { |
| 97 | + #power-domain-cells = <0>; |
| 98 | + reg = <1>; |
| 99 | + power-supply = <®_1p0d>; |
| 100 | + }; |
| 101 | +
|
| 102 | + pgc_hsic_phy: power-domain@2 { |
| 103 | + #power-domain-cells = <0>; |
| 104 | + reg = <2>; |
| 105 | + power-supply = <®_1p2>; |
| 106 | + }; |
| 107 | + }; |
| 108 | + }; |
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