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| 1 | +/* |
| 2 | + * Copyright (c) 2003-2004, NVIDIA CORPORATION. All rights reserved. |
| 3 | + * |
| 4 | + * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | + * copy of this software and associated documentation files (the "Software"), |
| 6 | + * to deal in the Software without restriction, including without limitation |
| 7 | + * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | + * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | + * Software is furnished to do so, subject to the following conditions: |
| 10 | + * |
| 11 | + * The above copyright notice and this permission notice shall be included in |
| 12 | + * all copies or substantial portions of the Software. |
| 13 | + * |
| 14 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 18 | + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 19 | + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 20 | + * DEALINGS IN THE SOFTWARE. |
| 21 | + */ |
| 22 | + |
| 23 | +#ifndef _cl_nv50_memory_to_memory_format_h_ |
| 24 | +#define _cl_nv50_memory_to_memory_format_h_ |
| 25 | + |
| 26 | +#define NV5039_SET_OBJECT 0x0000 |
| 27 | +#define NV5039_SET_OBJECT_POINTER 15:0 |
| 28 | + |
| 29 | +#define NV5039_NO_OPERATION 0x0100 |
| 30 | +#define NV5039_NO_OPERATION_V 31:0 |
| 31 | + |
| 32 | +#define NV5039_SET_CONTEXT_DMA_NOTIFY 0x0180 |
| 33 | +#define NV5039_SET_CONTEXT_DMA_NOTIFY_HANDLE 31:0 |
| 34 | + |
| 35 | +#define NV5039_SET_CONTEXT_DMA_BUFFER_IN 0x0184 |
| 36 | +#define NV5039_SET_CONTEXT_DMA_BUFFER_IN_HANDLE 31:0 |
| 37 | + |
| 38 | +#define NV5039_SET_CONTEXT_DMA_BUFFER_OUT 0x0188 |
| 39 | +#define NV5039_SET_CONTEXT_DMA_BUFFER_OUT_HANDLE 31:0 |
| 40 | + |
| 41 | +#define NV5039_SET_SRC_MEMORY_LAYOUT 0x0200 |
| 42 | +#define NV5039_SET_SRC_MEMORY_LAYOUT_V 0:0 |
| 43 | +#define NV5039_SET_SRC_MEMORY_LAYOUT_V_BLOCKLINEAR 0x00000000 |
| 44 | +#define NV5039_SET_SRC_MEMORY_LAYOUT_V_PITCH 0x00000001 |
| 45 | + |
| 46 | +#define NV5039_SET_SRC_BLOCK_SIZE 0x0204 |
| 47 | +#define NV5039_SET_SRC_BLOCK_SIZE_WIDTH 3:0 |
| 48 | +#define NV5039_SET_SRC_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 |
| 49 | +#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT 7:4 |
| 50 | +#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 |
| 51 | +#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 |
| 52 | +#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 |
| 53 | +#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 |
| 54 | +#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 |
| 55 | +#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 |
| 56 | +#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH 11:8 |
| 57 | +#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 |
| 58 | +#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 |
| 59 | +#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 |
| 60 | +#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 |
| 61 | +#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 |
| 62 | +#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 |
| 63 | + |
| 64 | +#define NV5039_SET_SRC_WIDTH 0x0208 |
| 65 | +#define NV5039_SET_SRC_WIDTH_V 31:0 |
| 66 | + |
| 67 | +#define NV5039_SET_SRC_HEIGHT 0x020c |
| 68 | +#define NV5039_SET_SRC_HEIGHT_V 31:0 |
| 69 | + |
| 70 | +#define NV5039_SET_SRC_DEPTH 0x0210 |
| 71 | +#define NV5039_SET_SRC_DEPTH_V 31:0 |
| 72 | + |
| 73 | +#define NV5039_SET_SRC_LAYER 0x0214 |
| 74 | +#define NV5039_SET_SRC_LAYER_V 31:0 |
| 75 | + |
| 76 | +#define NV5039_SET_SRC_ORIGIN 0x0218 |
| 77 | +#define NV5039_SET_SRC_ORIGIN_X 15:0 |
| 78 | +#define NV5039_SET_SRC_ORIGIN_Y 31:16 |
| 79 | + |
| 80 | +#define NV5039_SET_DST_MEMORY_LAYOUT 0x021c |
| 81 | +#define NV5039_SET_DST_MEMORY_LAYOUT_V 0:0 |
| 82 | +#define NV5039_SET_DST_MEMORY_LAYOUT_V_BLOCKLINEAR 0x00000000 |
| 83 | +#define NV5039_SET_DST_MEMORY_LAYOUT_V_PITCH 0x00000001 |
| 84 | + |
| 85 | +#define NV5039_SET_DST_BLOCK_SIZE 0x0220 |
| 86 | +#define NV5039_SET_DST_BLOCK_SIZE_WIDTH 3:0 |
| 87 | +#define NV5039_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 |
| 88 | +#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT 7:4 |
| 89 | +#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 |
| 90 | +#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 |
| 91 | +#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 |
| 92 | +#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 |
| 93 | +#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 |
| 94 | +#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 |
| 95 | +#define NV5039_SET_DST_BLOCK_SIZE_DEPTH 11:8 |
| 96 | +#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 |
| 97 | +#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 |
| 98 | +#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 |
| 99 | +#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 |
| 100 | +#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 |
| 101 | +#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 |
| 102 | + |
| 103 | +#define NV5039_SET_DST_WIDTH 0x0224 |
| 104 | +#define NV5039_SET_DST_WIDTH_V 31:0 |
| 105 | + |
| 106 | +#define NV5039_SET_DST_HEIGHT 0x0228 |
| 107 | +#define NV5039_SET_DST_HEIGHT_V 31:0 |
| 108 | + |
| 109 | +#define NV5039_SET_DST_DEPTH 0x022c |
| 110 | +#define NV5039_SET_DST_DEPTH_V 31:0 |
| 111 | + |
| 112 | +#define NV5039_SET_DST_LAYER 0x0230 |
| 113 | +#define NV5039_SET_DST_LAYER_V 31:0 |
| 114 | + |
| 115 | +#define NV5039_SET_DST_ORIGIN 0x0234 |
| 116 | +#define NV5039_SET_DST_ORIGIN_X 15:0 |
| 117 | +#define NV5039_SET_DST_ORIGIN_Y 31:16 |
| 118 | + |
| 119 | +#define NV5039_OFFSET_IN_UPPER 0x0238 |
| 120 | +#define NV5039_OFFSET_IN_UPPER_VALUE 7:0 |
| 121 | + |
| 122 | +#define NV5039_OFFSET_OUT_UPPER 0x023c |
| 123 | +#define NV5039_OFFSET_OUT_UPPER_VALUE 7:0 |
| 124 | + |
| 125 | +#define NV5039_OFFSET_IN 0x030c |
| 126 | +#define NV5039_OFFSET_IN_VALUE 31:0 |
| 127 | + |
| 128 | +#define NV5039_OFFSET_OUT 0x0310 |
| 129 | +#define NV5039_OFFSET_OUT_VALUE 31:0 |
| 130 | + |
| 131 | +#define NV5039_PITCH_IN 0x0314 |
| 132 | +#define NV5039_PITCH_IN_VALUE 31:0 |
| 133 | + |
| 134 | +#define NV5039_PITCH_OUT 0x0318 |
| 135 | +#define NV5039_PITCH_OUT_VALUE 31:0 |
| 136 | + |
| 137 | +#define NV5039_LINE_LENGTH_IN 0x031c |
| 138 | +#define NV5039_LINE_LENGTH_IN_VALUE 31:0 |
| 139 | + |
| 140 | +#define NV5039_LINE_COUNT 0x0320 |
| 141 | +#define NV5039_LINE_COUNT_VALUE 31:0 |
| 142 | + |
| 143 | +#define NV5039_FORMAT 0x0324 |
| 144 | +#define NV5039_FORMAT_IN 7:0 |
| 145 | +#define NV5039_FORMAT_IN_ONE 0x00000001 |
| 146 | +#define NV5039_FORMAT_OUT 15:8 |
| 147 | +#define NV5039_FORMAT_OUT_ONE 0x00000001 |
| 148 | + |
| 149 | +#define NV5039_BUFFER_NOTIFY 0x0328 |
| 150 | +#define NV5039_BUFFER_NOTIFY_TYPE 31:0 |
| 151 | +#define NV5039_BUFFER_NOTIFY_TYPE_WRITE_ONLY 0x00000000 |
| 152 | +#define NV5039_BUFFER_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 |
| 153 | +#endif /* _cl_nv50_memory_to_memory_format_h_ */ |
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