@@ -358,169 +358,8 @@ static int txgbe_gpio_direction_out(struct gpio_chip *chip, unsigned int offset,
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return 0 ;
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}
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- static void txgbe_gpio_irq_ack (struct irq_data * d )
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- {
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- struct gpio_chip * gc = irq_data_get_irq_chip_data (d );
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- irq_hw_number_t hwirq = irqd_to_hwirq (d );
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- struct wx * wx = gpiochip_get_data (gc );
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- unsigned long flags ;
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-
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- raw_spin_lock_irqsave (& wx -> gpio_lock , flags );
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- wr32 (wx , WX_GPIO_EOI , BIT (hwirq ));
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- raw_spin_unlock_irqrestore (& wx -> gpio_lock , flags );
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- }
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-
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- static void txgbe_gpio_irq_mask (struct irq_data * d )
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- {
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- struct gpio_chip * gc = irq_data_get_irq_chip_data (d );
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- irq_hw_number_t hwirq = irqd_to_hwirq (d );
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- struct wx * wx = gpiochip_get_data (gc );
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- unsigned long flags ;
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-
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- gpiochip_disable_irq (gc , hwirq );
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-
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- raw_spin_lock_irqsave (& wx -> gpio_lock , flags );
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- wr32m (wx , WX_GPIO_INTMASK , BIT (hwirq ), BIT (hwirq ));
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- raw_spin_unlock_irqrestore (& wx -> gpio_lock , flags );
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- }
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-
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- static void txgbe_gpio_irq_unmask (struct irq_data * d )
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- {
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- struct gpio_chip * gc = irq_data_get_irq_chip_data (d );
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- irq_hw_number_t hwirq = irqd_to_hwirq (d );
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- struct wx * wx = gpiochip_get_data (gc );
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- unsigned long flags ;
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-
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- gpiochip_enable_irq (gc , hwirq );
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-
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- raw_spin_lock_irqsave (& wx -> gpio_lock , flags );
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- wr32m (wx , WX_GPIO_INTMASK , BIT (hwirq ), 0 );
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- raw_spin_unlock_irqrestore (& wx -> gpio_lock , flags );
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- }
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-
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- static void txgbe_toggle_trigger (struct gpio_chip * gc , unsigned int offset )
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- {
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- struct wx * wx = gpiochip_get_data (gc );
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- u32 pol , val ;
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-
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- pol = rd32 (wx , WX_GPIO_POLARITY );
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- val = rd32 (wx , WX_GPIO_EXT );
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-
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- if (val & BIT (offset ))
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- pol &= ~BIT (offset );
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- else
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- pol |= BIT (offset );
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-
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- wr32 (wx , WX_GPIO_POLARITY , pol );
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- }
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-
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- static int txgbe_gpio_set_type (struct irq_data * d , unsigned int type )
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- {
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- struct gpio_chip * gc = irq_data_get_irq_chip_data (d );
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- irq_hw_number_t hwirq = irqd_to_hwirq (d );
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- struct wx * wx = gpiochip_get_data (gc );
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- u32 level , polarity , mask ;
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- unsigned long flags ;
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-
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- mask = BIT (hwirq );
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-
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- if (type & IRQ_TYPE_LEVEL_MASK ) {
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- level = 0 ;
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- irq_set_handler_locked (d , handle_level_irq );
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- } else {
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- level = mask ;
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- irq_set_handler_locked (d , handle_edge_irq );
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- }
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-
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- if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH )
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- polarity = mask ;
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- else
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- polarity = 0 ;
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-
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- raw_spin_lock_irqsave (& wx -> gpio_lock , flags );
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-
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- wr32m (wx , WX_GPIO_INTEN , mask , mask );
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- wr32m (wx , WX_GPIO_INTTYPE_LEVEL , mask , level );
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- if (type == IRQ_TYPE_EDGE_BOTH )
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- txgbe_toggle_trigger (gc , hwirq );
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- else
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- wr32m (wx , WX_GPIO_POLARITY , mask , polarity );
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-
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- raw_spin_unlock_irqrestore (& wx -> gpio_lock , flags );
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-
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- return 0 ;
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- }
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-
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- static const struct irq_chip txgbe_gpio_irq_chip = {
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- .name = "txgbe-gpio-irq" ,
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- .irq_ack = txgbe_gpio_irq_ack ,
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- .irq_mask = txgbe_gpio_irq_mask ,
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- .irq_unmask = txgbe_gpio_irq_unmask ,
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- .irq_set_type = txgbe_gpio_set_type ,
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- .flags = IRQCHIP_IMMUTABLE ,
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- GPIOCHIP_IRQ_RESOURCE_HELPERS ,
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- };
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-
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- irqreturn_t txgbe_gpio_irq_handler (int irq , void * data )
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- {
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- struct txgbe * txgbe = data ;
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- struct wx * wx = txgbe -> wx ;
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- irq_hw_number_t hwirq ;
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- unsigned long gpioirq ;
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- struct gpio_chip * gc ;
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- unsigned long flags ;
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-
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- gpioirq = rd32 (wx , WX_GPIO_INTSTATUS );
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-
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- gc = txgbe -> gpio ;
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- for_each_set_bit (hwirq , & gpioirq , gc -> ngpio ) {
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- int gpio = irq_find_mapping (gc -> irq .domain , hwirq );
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- struct irq_data * d = irq_get_irq_data (gpio );
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- u32 irq_type = irq_get_trigger_type (gpio );
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-
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- txgbe_gpio_irq_ack (d );
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- handle_nested_irq (gpio );
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-
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- if ((irq_type & IRQ_TYPE_SENSE_MASK ) == IRQ_TYPE_EDGE_BOTH ) {
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- raw_spin_lock_irqsave (& wx -> gpio_lock , flags );
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- txgbe_toggle_trigger (gc , hwirq );
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- raw_spin_unlock_irqrestore (& wx -> gpio_lock , flags );
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- }
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- }
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-
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- return IRQ_HANDLED ;
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- }
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-
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- void txgbe_reinit_gpio_intr (struct wx * wx )
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- {
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- struct txgbe * txgbe = wx -> priv ;
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- irq_hw_number_t hwirq ;
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- unsigned long gpioirq ;
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- struct gpio_chip * gc ;
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- unsigned long flags ;
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-
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- /* for gpio interrupt pending before irq enable */
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- gpioirq = rd32 (wx , WX_GPIO_INTSTATUS );
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-
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- gc = txgbe -> gpio ;
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- for_each_set_bit (hwirq , & gpioirq , gc -> ngpio ) {
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- int gpio = irq_find_mapping (gc -> irq .domain , hwirq );
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- struct irq_data * d = irq_get_irq_data (gpio );
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- u32 irq_type = irq_get_trigger_type (gpio );
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-
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- txgbe_gpio_irq_ack (d );
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-
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- if ((irq_type & IRQ_TYPE_SENSE_MASK ) == IRQ_TYPE_EDGE_BOTH ) {
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- raw_spin_lock_irqsave (& wx -> gpio_lock , flags );
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- txgbe_toggle_trigger (gc , hwirq );
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- raw_spin_unlock_irqrestore (& wx -> gpio_lock , flags );
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- }
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- }
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- }
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-
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static int txgbe_gpio_init (struct txgbe * txgbe )
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{
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- struct gpio_irq_chip * girq ;
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struct gpio_chip * gc ;
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struct device * dev ;
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struct wx * wx ;
@@ -550,11 +389,6 @@ static int txgbe_gpio_init(struct txgbe *txgbe)
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gc -> direction_input = txgbe_gpio_direction_in ;
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gc -> direction_output = txgbe_gpio_direction_out ;
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- girq = & gc -> irq ;
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- gpio_irq_chip_set_chip (girq , & txgbe_gpio_irq_chip );
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- girq -> default_type = IRQ_TYPE_NONE ;
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- girq -> handler = handle_bad_irq ;
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-
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ret = devm_gpiochip_add_data (dev , gc , wx );
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if (ret )
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return ret ;
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