@@ -160,6 +160,7 @@ enum mtk_iommu_plat {
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M4U_MT8167 ,
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M4U_MT8173 ,
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M4U_MT8183 ,
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+ M4U_MT8186 ,
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M4U_MT8192 ,
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M4U_MT8195 ,
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};
@@ -1437,6 +1438,20 @@ static const struct mtk_iommu_plat_data mt8183_data = {
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.larbid_remap = {{0 }, {4 }, {5 }, {6 }, {7 }, {2 }, {3 }, {1 }},
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};
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+ static const struct mtk_iommu_plat_data mt8186_data_mm = {
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+ .m4u_plat = M4U_MT8186 ,
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+ .flags = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |
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+ WR_THROT_EN | IOVA_34_EN | MTK_IOMMU_TYPE_MM ,
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+ .larbid_remap = {{0 }, {1 , MTK_INVALID_LARBID , 8 }, {4 }, {7 }, {2 }, {9 , 11 , 19 , 20 },
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+ {MTK_INVALID_LARBID , 14 , 16 },
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+ {MTK_INVALID_LARBID , 13 , MTK_INVALID_LARBID , 17 }},
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+ .inv_sel_reg = REG_MMU_INV_SEL_GEN2 ,
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+ .banks_num = 1 ,
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+ .banks_enable = {true},
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+ .iova_region = mt8192_multi_dom ,
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+ .iova_region_nr = ARRAY_SIZE (mt8192_multi_dom ),
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+ };
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+
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static const struct mtk_iommu_plat_data mt8192_data = {
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.m4u_plat = M4U_MT8192 ,
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.flags = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |
@@ -1503,6 +1518,7 @@ static const struct of_device_id mtk_iommu_of_ids[] = {
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{ .compatible = "mediatek,mt8167-m4u" , .data = & mt8167_data },
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{ .compatible = "mediatek,mt8173-m4u" , .data = & mt8173_data },
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{ .compatible = "mediatek,mt8183-m4u" , .data = & mt8183_data },
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+ { .compatible = "mediatek,mt8186-iommu-mm" , .data = & mt8186_data_mm }, /* mm: m4u */
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{ .compatible = "mediatek,mt8192-m4u" , .data = & mt8192_data },
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{ .compatible = "mediatek,mt8195-iommu-infra" , .data = & mt8195_data_infra },
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{ .compatible = "mediatek,mt8195-iommu-vdo" , .data = & mt8195_data_vdo },
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