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Merge tag 'renesas-clk-for-v6.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull more Renesas clk driver updates from Geert Uytterhoeven: - Convert the Renesas clock drivers to readl_poll_timeout_atomic() * tag 'renesas-clk-for-v6.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: clk: renesas: rzg2l: Convert to readl_poll_timeout_atomic() clk: renesas: mstp: Convert to readl_poll_timeout_atomic() clk: renesas: cpg-mssr: Convert to readl_poll_timeout_atomic() iopoll: Do not use timekeeping in read_poll_timeout_atomic() iopoll: Call cpu_relax() in busy loops
2 parents f73b836 + 7df8eea commit e90f15b

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4 files changed

+42
-47
lines changed

4 files changed

+42
-47
lines changed

drivers/clk/renesas/clk-mstp.c

Lines changed: 7 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414
#include <linux/clk/renesas.h>
1515
#include <linux/device.h>
1616
#include <linux/io.h>
17+
#include <linux/iopoll.h>
1718
#include <linux/of.h>
1819
#include <linux/of_address.h>
1920
#include <linux/pm_clock.h>
@@ -78,8 +79,8 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable)
7879
struct mstp_clock_group *group = clock->group;
7980
u32 bitmask = BIT(clock->bit_index);
8081
unsigned long flags;
81-
unsigned int i;
8282
u32 value;
83+
int ret;
8384

8485
spin_lock_irqsave(&group->lock, flags);
8586

@@ -101,19 +102,14 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable)
101102
if (!enable || !group->mstpsr)
102103
return 0;
103104

104-
for (i = 1000; i > 0; --i) {
105-
if (!(cpg_mstp_read(group, group->mstpsr) & bitmask))
106-
break;
107-
cpu_relax();
108-
}
109-
110-
if (!i) {
105+
/* group->width_8bit is always false if group->mstpsr is present */
106+
ret = readl_poll_timeout_atomic(group->mstpsr, value,
107+
!(value & bitmask), 0, 10);
108+
if (ret)
111109
pr_err("%s: failed to enable %p[%d]\n", __func__,
112110
group->smstpcr, clock->bit_index);
113-
return -ETIMEDOUT;
114-
}
115111

116-
return 0;
112+
return ret;
117113
}
118114

119115
static int cpg_mstp_clock_enable(struct clk_hw *hw)

drivers/clk/renesas/renesas-cpg-mssr.c

Lines changed: 11 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@
1717
#include <linux/device.h>
1818
#include <linux/init.h>
1919
#include <linux/io.h>
20+
#include <linux/iopoll.h>
2021
#include <linux/mod_devicetable.h>
2122
#include <linux/module.h>
2223
#include <linux/of_address.h>
@@ -196,8 +197,8 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable)
196197
struct device *dev = priv->dev;
197198
u32 bitmask = BIT(bit);
198199
unsigned long flags;
199-
unsigned int i;
200200
u32 value;
201+
int error;
201202

202203
dev_dbg(dev, "MSTP %u%02u/%pC %s\n", reg, bit, hw->clk,
203204
enable ? "ON" : "OFF");
@@ -228,19 +229,13 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable)
228229
if (!enable || priv->reg_layout == CLK_REG_LAYOUT_RZ_A)
229230
return 0;
230231

231-
for (i = 1000; i > 0; --i) {
232-
if (!(readl(priv->base + priv->status_regs[reg]) & bitmask))
233-
break;
234-
cpu_relax();
235-
}
236-
237-
if (!i) {
232+
error = readl_poll_timeout_atomic(priv->base + priv->status_regs[reg],
233+
value, !(value & bitmask), 0, 10);
234+
if (error)
238235
dev_err(dev, "Failed to enable SMSTP %p[%d]\n",
239236
priv->base + priv->control_regs[reg], bit);
240-
return -ETIMEDOUT;
241-
}
242237

243-
return 0;
238+
return error;
244239
}
245240

246241
static int cpg_mstp_clock_enable(struct clk_hw *hw)
@@ -896,8 +891,9 @@ static int cpg_mssr_suspend_noirq(struct device *dev)
896891
static int cpg_mssr_resume_noirq(struct device *dev)
897892
{
898893
struct cpg_mssr_priv *priv = dev_get_drvdata(dev);
899-
unsigned int reg, i;
894+
unsigned int reg;
900895
u32 mask, oldval, newval;
896+
int error;
901897

902898
/* This is the best we can do to check for the presence of PSCI */
903899
if (!psci_ops.cpu_suspend)
@@ -935,14 +931,9 @@ static int cpg_mssr_resume_noirq(struct device *dev)
935931
if (!mask)
936932
continue;
937933

938-
for (i = 1000; i > 0; --i) {
939-
oldval = readl(priv->base + priv->status_regs[reg]);
940-
if (!(oldval & mask))
941-
break;
942-
cpu_relax();
943-
}
944-
945-
if (!i)
934+
error = readl_poll_timeout_atomic(priv->base + priv->status_regs[reg],
935+
oldval, !(oldval & mask), 0, 10);
936+
if (error)
946937
dev_warn(dev, "Failed to enable SMSTP%u[0x%x]\n", reg,
947938
oldval & mask);
948939
}

drivers/clk/renesas/rzg2l-cpg.c

Lines changed: 5 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -903,9 +903,9 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable)
903903
unsigned int reg = clock->off;
904904
struct device *dev = priv->dev;
905905
unsigned long flags;
906-
unsigned int i;
907906
u32 bitmask = BIT(clock->bit);
908907
u32 value;
908+
int error;
909909

910910
if (!clock->off) {
911911
dev_dbg(dev, "%pC does not support ON/OFF\n", hw->clk);
@@ -930,19 +930,13 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable)
930930
if (!priv->info->has_clk_mon_regs)
931931
return 0;
932932

933-
for (i = 1000; i > 0; --i) {
934-
if (((readl(priv->base + CLK_MON_R(reg))) & bitmask))
935-
break;
936-
cpu_relax();
937-
}
938-
939-
if (!i) {
933+
error = readl_poll_timeout_atomic(priv->base + CLK_MON_R(reg), value,
934+
value & bitmask, 0, 10);
935+
if (error)
940936
dev_err(dev, "Failed to enable CLK_ON %p\n",
941937
priv->base + CLK_ON_R(reg));
942-
return -ETIMEDOUT;
943-
}
944938

945-
return 0;
939+
return error;
946940
}
947941

948942
static int rzg2l_mod_clock_enable(struct clk_hw *hw)

include/linux/iopoll.h

Lines changed: 19 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -53,6 +53,7 @@
5353
} \
5454
if (__sleep_us) \
5555
usleep_range((__sleep_us >> 2) + 1, __sleep_us); \
56+
cpu_relax(); \
5657
} \
5758
(cond) ? 0 : -ETIMEDOUT; \
5859
})
@@ -73,28 +74,41 @@
7374
* Returns 0 on success and -ETIMEDOUT upon a timeout. In either
7475
* case, the last read value at @args is stored in @val.
7576
*
77+
* This macro does not rely on timekeeping. Hence it is safe to call even when
78+
* timekeeping is suspended, at the expense of an underestimation of wall clock
79+
* time, which is rather minimal with a non-zero delay_us.
80+
*
7681
* When available, you'll probably want to use one of the specialized
7782
* macros defined below rather than this macro directly.
7883
*/
7984
#define read_poll_timeout_atomic(op, val, cond, delay_us, timeout_us, \
8085
delay_before_read, args...) \
8186
({ \
8287
u64 __timeout_us = (timeout_us); \
88+
s64 __left_ns = __timeout_us * NSEC_PER_USEC; \
8389
unsigned long __delay_us = (delay_us); \
84-
ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \
85-
if (delay_before_read && __delay_us) \
90+
u64 __delay_ns = __delay_us * NSEC_PER_USEC; \
91+
if (delay_before_read && __delay_us) { \
8692
udelay(__delay_us); \
93+
if (__timeout_us) \
94+
__left_ns -= __delay_ns; \
95+
} \
8796
for (;;) { \
8897
(val) = op(args); \
8998
if (cond) \
9099
break; \
91-
if (__timeout_us && \
92-
ktime_compare(ktime_get(), __timeout) > 0) { \
100+
if (__timeout_us && __left_ns < 0) { \
93101
(val) = op(args); \
94102
break; \
95103
} \
96-
if (__delay_us) \
104+
if (__delay_us) { \
97105
udelay(__delay_us); \
106+
if (__timeout_us) \
107+
__left_ns -= __delay_ns; \
108+
} \
109+
cpu_relax(); \
110+
if (__timeout_us) \
111+
__left_ns--; \
98112
} \
99113
(cond) ? 0 : -ETIMEDOUT; \
100114
})

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