@@ -49,7 +49,7 @@ struct dio48e_gpio {
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unsigned char out_state [6 ];
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unsigned char control [2 ];
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raw_spinlock_t lock ;
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- unsigned int base ;
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+ void __iomem * base ;
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unsigned char irq_mask ;
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};
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@@ -70,7 +70,7 @@ static int dio48e_gpio_direction_input(struct gpio_chip *chip, unsigned int offs
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struct dio48e_gpio * const dio48egpio = gpiochip_get_data (chip );
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const unsigned int io_port = offset / 8 ;
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const unsigned int control_port = io_port / 3 ;
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- const unsigned int control_addr = dio48egpio -> base + 3 + control_port * 4 ;
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+ void __iomem * const control_addr = dio48egpio -> base + 3 + control_port * 4 ;
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unsigned long flags ;
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unsigned int control ;
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@@ -95,9 +95,9 @@ static int dio48e_gpio_direction_input(struct gpio_chip *chip, unsigned int offs
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}
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control = BIT (7 ) | dio48egpio -> control [control_port ];
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- outb (control , control_addr );
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+ iowrite8 (control , control_addr );
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control &= ~BIT (7 );
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- outb (control , control_addr );
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+ iowrite8 (control , control_addr );
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raw_spin_unlock_irqrestore (& dio48egpio -> lock , flags );
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@@ -111,7 +111,7 @@ static int dio48e_gpio_direction_output(struct gpio_chip *chip, unsigned int off
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const unsigned int io_port = offset / 8 ;
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const unsigned int control_port = io_port / 3 ;
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const unsigned int mask = BIT (offset % 8 );
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- const unsigned int control_addr = dio48egpio -> base + 3 + control_port * 4 ;
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+ void __iomem * const control_addr = dio48egpio -> base + 3 + control_port * 4 ;
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const unsigned int out_port = (io_port > 2 ) ? io_port + 1 : io_port ;
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unsigned long flags ;
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unsigned int control ;
@@ -142,12 +142,12 @@ static int dio48e_gpio_direction_output(struct gpio_chip *chip, unsigned int off
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dio48egpio -> out_state [io_port ] &= ~mask ;
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control = BIT (7 ) | dio48egpio -> control [control_port ];
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- outb (control , control_addr );
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+ iowrite8 (control , control_addr );
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- outb (dio48egpio -> out_state [io_port ], dio48egpio -> base + out_port );
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+ iowrite8 (dio48egpio -> out_state [io_port ], dio48egpio -> base + out_port );
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control &= ~BIT (7 );
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- outb (control , control_addr );
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+ iowrite8 (control , control_addr );
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raw_spin_unlock_irqrestore (& dio48egpio -> lock , flags );
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@@ -171,7 +171,7 @@ static int dio48e_gpio_get(struct gpio_chip *chip, unsigned int offset)
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return - EINVAL ;
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}
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- port_state = inb (dio48egpio -> base + in_port );
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+ port_state = ioread8 (dio48egpio -> base + in_port );
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raw_spin_unlock_irqrestore (& dio48egpio -> lock , flags );
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@@ -186,15 +186,15 @@ static int dio48e_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
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struct dio48e_gpio * const dio48egpio = gpiochip_get_data (chip );
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unsigned long offset ;
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unsigned long gpio_mask ;
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- unsigned int port_addr ;
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+ void __iomem * port_addr ;
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unsigned long port_state ;
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/* clear bits array to a clean slate */
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bitmap_zero (bits , chip -> ngpio );
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for_each_set_clump8 (offset , gpio_mask , mask , ARRAY_SIZE (ports ) * 8 ) {
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port_addr = dio48egpio -> base + ports [offset / 8 ];
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- port_state = inb (port_addr ) & gpio_mask ;
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+ port_state = ioread8 (port_addr ) & gpio_mask ;
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bitmap_set_value8 (bits , port_state , offset );
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}
@@ -217,7 +217,7 @@ static void dio48e_gpio_set(struct gpio_chip *chip, unsigned int offset, int val
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else
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dio48egpio -> out_state [port ] &= ~mask ;
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- outb (dio48egpio -> out_state [port ], dio48egpio -> base + out_port );
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+ iowrite8 (dio48egpio -> out_state [port ], dio48egpio -> base + out_port );
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raw_spin_unlock_irqrestore (& dio48egpio -> lock , flags );
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}
@@ -229,7 +229,7 @@ static void dio48e_gpio_set_multiple(struct gpio_chip *chip,
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unsigned long offset ;
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unsigned long gpio_mask ;
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size_t index ;
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- unsigned int port_addr ;
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+ void __iomem * port_addr ;
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unsigned long bitmask ;
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unsigned long flags ;
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@@ -244,7 +244,7 @@ static void dio48e_gpio_set_multiple(struct gpio_chip *chip,
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/* update output state data and set device gpio register */
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dio48egpio -> out_state [index ] &= ~gpio_mask ;
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dio48egpio -> out_state [index ] |= bitmask ;
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- outb (dio48egpio -> out_state [index ], port_addr );
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+ iowrite8 (dio48egpio -> out_state [index ], port_addr );
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raw_spin_unlock_irqrestore (& dio48egpio -> lock , flags );
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}
@@ -274,7 +274,7 @@ static void dio48e_irq_mask(struct irq_data *data)
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if (!dio48egpio -> irq_mask )
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/* disable interrupts */
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- inb (dio48egpio -> base + 0xB );
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+ ioread8 (dio48egpio -> base + 0xB );
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raw_spin_unlock_irqrestore (& dio48egpio -> lock , flags );
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}
@@ -294,8 +294,8 @@ static void dio48e_irq_unmask(struct irq_data *data)
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if (!dio48egpio -> irq_mask ) {
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/* enable interrupts */
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- outb (0x00 , dio48egpio -> base + 0xF );
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- outb (0x00 , dio48egpio -> base + 0xB );
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+ iowrite8 (0x00 , dio48egpio -> base + 0xF );
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+ iowrite8 (0x00 , dio48egpio -> base + 0xB );
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}
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if (offset == 19 )
@@ -341,7 +341,7 @@ static irqreturn_t dio48e_irq_handler(int irq, void *dev_id)
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raw_spin_lock (& dio48egpio -> lock );
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- outb (0x00 , dio48egpio -> base + 0xF );
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+ iowrite8 (0x00 , dio48egpio -> base + 0xF );
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raw_spin_unlock (& dio48egpio -> lock );
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@@ -373,7 +373,7 @@ static int dio48e_irq_init_hw(struct gpio_chip *gc)
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struct dio48e_gpio * const dio48egpio = gpiochip_get_data (gc );
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/* Disable IRQ by default */
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- inb (dio48egpio -> base + 0xB );
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+ ioread8 (dio48egpio -> base + 0xB );
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return 0 ;
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}
@@ -395,6 +395,10 @@ static int dio48e_probe(struct device *dev, unsigned int id)
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return - EBUSY ;
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}
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+ dio48egpio -> base = devm_ioport_map (dev , base [id ], DIO48E_EXTENT );
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+ if (!dio48egpio -> base )
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+ return - ENOMEM ;
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+
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dio48egpio -> chip .label = name ;
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dio48egpio -> chip .parent = dev ;
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dio48egpio -> chip .owner = THIS_MODULE ;
@@ -408,7 +412,6 @@ static int dio48e_probe(struct device *dev, unsigned int id)
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dio48egpio -> chip .get_multiple = dio48e_gpio_get_multiple ;
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dio48egpio -> chip .set = dio48e_gpio_set ;
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dio48egpio -> chip .set_multiple = dio48e_gpio_set_multiple ;
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- dio48egpio -> base = base [id ];
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girq = & dio48egpio -> chip .irq ;
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girq -> chip = & dio48e_irqchip ;
@@ -423,16 +426,16 @@ static int dio48e_probe(struct device *dev, unsigned int id)
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raw_spin_lock_init (& dio48egpio -> lock );
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/* initialize all GPIO as output */
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- outb (0x80 , base [ id ] + 3 );
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- outb (0x00 , base [ id ] );
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- outb (0x00 , base [ id ] + 1 );
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- outb (0x00 , base [ id ] + 2 );
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- outb (0x00 , base [ id ] + 3 );
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- outb (0x80 , base [ id ] + 7 );
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- outb (0x00 , base [ id ] + 4 );
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- outb (0x00 , base [ id ] + 5 );
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- outb (0x00 , base [ id ] + 6 );
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- outb (0x00 , base [ id ] + 7 );
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+ iowrite8 (0x80 , dio48egpio -> base + 3 );
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+ iowrite8 (0x00 , dio48egpio -> base );
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+ iowrite8 (0x00 , dio48egpio -> base + 1 );
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+ iowrite8 (0x00 , dio48egpio -> base + 2 );
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+ iowrite8 (0x00 , dio48egpio -> base + 3 );
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+ iowrite8 (0x80 , dio48egpio -> base + 7 );
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+ iowrite8 (0x00 , dio48egpio -> base + 4 );
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+ iowrite8 (0x00 , dio48egpio -> base + 5 );
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+ iowrite8 (0x00 , dio48egpio -> base + 6 );
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+ iowrite8 (0x00 , dio48egpio -> base + 7 );
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err = devm_gpiochip_add_data (dev , & dio48egpio -> chip , dio48egpio );
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if (err ) {
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