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Marc Zyngier
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Merge branch kvm-arm64/mpidr-reset into kvmarm-master/next
* kvm-arm64/mpidr-reset: : . : Fixes for CLIDR_EL1 and MPIDR_EL1 being accidentally mutable across : a vcpu reset, courtesy of Oliver. From the cover letter: : : "For VM-wide feature ID registers we ensure they get initialized once for : the lifetime of a VM. On the other hand, vCPU-local feature ID registers : get re-initialized on every vCPU reset, potentially clobbering the : values userspace set up. : : MPIDR_EL1 and CLIDR_EL1 are the only registers in this space that we : allow userspace to modify for now. Clobbering the value of MPIDR_EL1 has : some disastrous side effects as the compressed index used by the : MPIDR-to-vCPU lookup table assumes MPIDR_EL1 is immutable after KVM_RUN. : : Series + reproducer test case to address the problem of KVM wiping out : userspace changes to these registers. Note that there are still some : differences between VM and vCPU scoped feature ID registers from the : perspective of userspace. We do not allow the value of VM-scope : registers to change after KVM_RUN, but vCPU registers remain mutable." : . KVM: selftests: arm64: Test vCPU-scoped feature ID registers KVM: selftests: arm64: Test that feature ID regs survive a reset KVM: selftests: arm64: Store expected register value in set_id_regs KVM: selftests: arm64: Rename helper in set_id_regs to imply VM scope KVM: arm64: Only reset vCPU-scoped feature ID regs once KVM: arm64: Reset VM feature ID regs from kvm_reset_sys_regs() KVM: arm64: Rename is_id_reg() to imply VM scope Signed-off-by: Marc Zyngier <[email protected]>
2 parents e281570 + 606af82 commit eaa46a2

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arch/arm64/include/asm/kvm_host.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1318,6 +1318,8 @@ static inline bool __vcpu_has_feature(const struct kvm_arch *ka, int feature)
13181318

13191319
#define vcpu_has_feature(v, f) __vcpu_has_feature(&(v)->kvm->arch, (f))
13201320

1321+
#define kvm_vcpu_initialized(v) vcpu_get_flag(vcpu, VCPU_INITIALIZED)
1322+
13211323
int kvm_trng_call(struct kvm_vcpu *vcpu);
13221324
#ifdef CONFIG_KVM
13231325
extern phys_addr_t hyp_mem_base;

arch/arm64/kvm/arm.c

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -698,11 +698,6 @@ unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu *vcpu)
698698
}
699699
#endif
700700

701-
static int kvm_vcpu_initialized(struct kvm_vcpu *vcpu)
702-
{
703-
return vcpu_get_flag(vcpu, VCPU_INITIALIZED);
704-
}
705-
706701
static void kvm_init_mpidr_data(struct kvm *kvm)
707702
{
708703
struct kvm_mpidr_data *data = NULL;

arch/arm64/kvm/sys_regs.c

Lines changed: 36 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -1568,17 +1568,31 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu, const struct sys_reg_desc *r
15681568
return IDREG(vcpu->kvm, reg_to_encoding(r));
15691569
}
15701570

1571+
static bool is_feature_id_reg(u32 encoding)
1572+
{
1573+
return (sys_reg_Op0(encoding) == 3 &&
1574+
(sys_reg_Op1(encoding) < 2 || sys_reg_Op1(encoding) == 3) &&
1575+
sys_reg_CRn(encoding) == 0 &&
1576+
sys_reg_CRm(encoding) <= 7);
1577+
}
1578+
15711579
/*
15721580
* Return true if the register's (Op0, Op1, CRn, CRm, Op2) is
1573-
* (3, 0, 0, crm, op2), where 1<=crm<8, 0<=op2<8.
1581+
* (3, 0, 0, crm, op2), where 1<=crm<8, 0<=op2<8, which is the range of ID
1582+
* registers KVM maintains on a per-VM basis.
15741583
*/
1575-
static inline bool is_id_reg(u32 id)
1584+
static inline bool is_vm_ftr_id_reg(u32 id)
15761585
{
15771586
return (sys_reg_Op0(id) == 3 && sys_reg_Op1(id) == 0 &&
15781587
sys_reg_CRn(id) == 0 && sys_reg_CRm(id) >= 1 &&
15791588
sys_reg_CRm(id) < 8);
15801589
}
15811590

1591+
static inline bool is_vcpu_ftr_id_reg(u32 id)
1592+
{
1593+
return is_feature_id_reg(id) && !is_vm_ftr_id_reg(id);
1594+
}
1595+
15821596
static inline bool is_aa32_id_reg(u32 id)
15831597
{
15841598
return (sys_reg_Op0(id) == 3 && sys_reg_Op1(id) == 0 &&
@@ -3510,26 +3524,25 @@ void kvm_sys_regs_create_debugfs(struct kvm *kvm)
35103524
&idregs_debug_fops);
35113525
}
35123526

3513-
static void kvm_reset_id_regs(struct kvm_vcpu *vcpu)
3527+
static void reset_vm_ftr_id_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *reg)
35143528
{
3515-
const struct sys_reg_desc *idreg = first_idreg;
3516-
u32 id = reg_to_encoding(idreg);
3529+
u32 id = reg_to_encoding(reg);
35173530
struct kvm *kvm = vcpu->kvm;
35183531

35193532
if (test_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &kvm->arch.flags))
35203533
return;
35213534

35223535
lockdep_assert_held(&kvm->arch.config_lock);
3536+
IDREG(kvm, id) = reg->reset(vcpu, reg);
3537+
}
35233538

3524-
/* Initialize all idregs */
3525-
while (is_id_reg(id)) {
3526-
IDREG(kvm, id) = idreg->reset(vcpu, idreg);
3527-
3528-
idreg++;
3529-
id = reg_to_encoding(idreg);
3530-
}
3539+
static void reset_vcpu_ftr_id_reg(struct kvm_vcpu *vcpu,
3540+
const struct sys_reg_desc *reg)
3541+
{
3542+
if (kvm_vcpu_initialized(vcpu))
3543+
return;
35313544

3532-
set_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &kvm->arch.flags);
3545+
reg->reset(vcpu, reg);
35333546
}
35343547

35353548
/**
@@ -3541,19 +3554,24 @@ static void kvm_reset_id_regs(struct kvm_vcpu *vcpu)
35413554
*/
35423555
void kvm_reset_sys_regs(struct kvm_vcpu *vcpu)
35433556
{
3557+
struct kvm *kvm = vcpu->kvm;
35443558
unsigned long i;
35453559

3546-
kvm_reset_id_regs(vcpu);
3547-
35483560
for (i = 0; i < ARRAY_SIZE(sys_reg_descs); i++) {
35493561
const struct sys_reg_desc *r = &sys_reg_descs[i];
35503562

3551-
if (is_id_reg(reg_to_encoding(r)))
3563+
if (!r->reset)
35523564
continue;
35533565

3554-
if (r->reset)
3566+
if (is_vm_ftr_id_reg(reg_to_encoding(r)))
3567+
reset_vm_ftr_id_reg(vcpu, r);
3568+
else if (is_vcpu_ftr_id_reg(reg_to_encoding(r)))
3569+
reset_vcpu_ftr_id_reg(vcpu, r);
3570+
else
35553571
r->reset(vcpu, r);
35563572
}
3573+
3574+
set_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &kvm->arch.flags);
35573575
}
35583576

35593577
/**
@@ -3979,14 +3997,6 @@ int kvm_arm_copy_sys_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
39793997
sys_reg_CRm(r), \
39803998
sys_reg_Op2(r))
39813999

3982-
static bool is_feature_id_reg(u32 encoding)
3983-
{
3984-
return (sys_reg_Op0(encoding) == 3 &&
3985-
(sys_reg_Op1(encoding) < 2 || sys_reg_Op1(encoding) == 3) &&
3986-
sys_reg_CRn(encoding) == 0 &&
3987-
sys_reg_CRm(encoding) <= 7);
3988-
}
3989-
39904000
int kvm_vm_ioctl_get_reg_writable_masks(struct kvm *kvm, struct reg_mask_range *range)
39914001
{
39924002
const void *zero_page = page_to_virt(ZERO_PAGE(0));
@@ -4015,7 +4025,7 @@ int kvm_vm_ioctl_get_reg_writable_masks(struct kvm *kvm, struct reg_mask_range *
40154025
* compliant with a given revision of the architecture, but the
40164026
* RES0/RES1 definitions allow us to do that.
40174027
*/
4018-
if (is_id_reg(encoding)) {
4028+
if (is_vm_ftr_id_reg(encoding)) {
40194029
if (!reg->val ||
40204030
(is_aa32_id_reg(encoding) && !kvm_supports_32bit_el0()))
40214031
continue;

tools/testing/selftests/kvm/aarch64/set_id_regs.c

Lines changed: 104 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -327,8 +327,8 @@ uint64_t get_invalid_value(const struct reg_ftr_bits *ftr_bits, uint64_t ftr)
327327
return ftr;
328328
}
329329

330-
static void test_reg_set_success(struct kvm_vcpu *vcpu, uint64_t reg,
331-
const struct reg_ftr_bits *ftr_bits)
330+
static uint64_t test_reg_set_success(struct kvm_vcpu *vcpu, uint64_t reg,
331+
const struct reg_ftr_bits *ftr_bits)
332332
{
333333
uint8_t shift = ftr_bits->shift;
334334
uint64_t mask = ftr_bits->mask;
@@ -346,6 +346,8 @@ static void test_reg_set_success(struct kvm_vcpu *vcpu, uint64_t reg,
346346
vcpu_set_reg(vcpu, reg, val);
347347
vcpu_get_reg(vcpu, reg, &new_val);
348348
TEST_ASSERT_EQ(new_val, val);
349+
350+
return new_val;
349351
}
350352

351353
static void test_reg_set_fail(struct kvm_vcpu *vcpu, uint64_t reg,
@@ -374,7 +376,15 @@ static void test_reg_set_fail(struct kvm_vcpu *vcpu, uint64_t reg,
374376
TEST_ASSERT_EQ(val, old_val);
375377
}
376378

377-
static void test_user_set_reg(struct kvm_vcpu *vcpu, bool aarch64_only)
379+
static uint64_t test_reg_vals[KVM_ARM_FEATURE_ID_RANGE_SIZE];
380+
381+
#define encoding_to_range_idx(encoding) \
382+
KVM_ARM_FEATURE_ID_RANGE_IDX(sys_reg_Op0(encoding), sys_reg_Op1(encoding), \
383+
sys_reg_CRn(encoding), sys_reg_CRm(encoding), \
384+
sys_reg_Op2(encoding))
385+
386+
387+
static void test_vm_ftr_id_regs(struct kvm_vcpu *vcpu, bool aarch64_only)
378388
{
379389
uint64_t masks[KVM_ARM_FEATURE_ID_RANGE_SIZE];
380390
struct reg_mask_range range = {
@@ -398,9 +408,7 @@ static void test_user_set_reg(struct kvm_vcpu *vcpu, bool aarch64_only)
398408
int idx;
399409

400410
/* Get the index to masks array for the idreg */
401-
idx = KVM_ARM_FEATURE_ID_RANGE_IDX(sys_reg_Op0(reg_id), sys_reg_Op1(reg_id),
402-
sys_reg_CRn(reg_id), sys_reg_CRm(reg_id),
403-
sys_reg_Op2(reg_id));
411+
idx = encoding_to_range_idx(reg_id);
404412

405413
for (int j = 0; ftr_bits[j].type != FTR_END; j++) {
406414
/* Skip aarch32 reg on aarch64 only system, since they are RAZ/WI. */
@@ -414,7 +422,9 @@ static void test_user_set_reg(struct kvm_vcpu *vcpu, bool aarch64_only)
414422
TEST_ASSERT_EQ(masks[idx] & ftr_bits[j].mask, ftr_bits[j].mask);
415423

416424
test_reg_set_fail(vcpu, reg, &ftr_bits[j]);
417-
test_reg_set_success(vcpu, reg, &ftr_bits[j]);
425+
426+
test_reg_vals[idx] = test_reg_set_success(vcpu, reg,
427+
&ftr_bits[j]);
418428

419429
ksft_test_result_pass("%s\n", ftr_bits[j].name);
420430
}
@@ -425,7 +435,6 @@ static void test_guest_reg_read(struct kvm_vcpu *vcpu)
425435
{
426436
bool done = false;
427437
struct ucall uc;
428-
uint64_t val;
429438

430439
while (!done) {
431440
vcpu_run(vcpu);
@@ -436,8 +445,8 @@ static void test_guest_reg_read(struct kvm_vcpu *vcpu)
436445
break;
437446
case UCALL_SYNC:
438447
/* Make sure the written values are seen by guest */
439-
vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(uc.args[2]), &val);
440-
TEST_ASSERT_EQ(val, uc.args[3]);
448+
TEST_ASSERT_EQ(test_reg_vals[encoding_to_range_idx(uc.args[2])],
449+
uc.args[3]);
441450
break;
442451
case UCALL_DONE:
443452
done = true;
@@ -448,13 +457,85 @@ static void test_guest_reg_read(struct kvm_vcpu *vcpu)
448457
}
449458
}
450459

460+
/* Politely lifted from arch/arm64/include/asm/cache.h */
461+
/* Ctypen, bits[3(n - 1) + 2 : 3(n - 1)], for n = 1 to 7 */
462+
#define CLIDR_CTYPE_SHIFT(level) (3 * (level - 1))
463+
#define CLIDR_CTYPE_MASK(level) (7 << CLIDR_CTYPE_SHIFT(level))
464+
#define CLIDR_CTYPE(clidr, level) \
465+
(((clidr) & CLIDR_CTYPE_MASK(level)) >> CLIDR_CTYPE_SHIFT(level))
466+
467+
static void test_clidr(struct kvm_vcpu *vcpu)
468+
{
469+
uint64_t clidr;
470+
int level;
471+
472+
vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_CLIDR_EL1), &clidr);
473+
474+
/* find the first empty level in the cache hierarchy */
475+
for (level = 1; level < 7; level++) {
476+
if (!CLIDR_CTYPE(clidr, level))
477+
break;
478+
}
479+
480+
/*
481+
* If you have a mind-boggling 7 levels of cache, congratulations, you
482+
* get to fix this.
483+
*/
484+
TEST_ASSERT(level <= 7, "can't find an empty level in cache hierarchy");
485+
486+
/* stick in a unified cache level */
487+
clidr |= BIT(2) << CLIDR_CTYPE_SHIFT(level);
488+
489+
vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_CLIDR_EL1), clidr);
490+
test_reg_vals[encoding_to_range_idx(SYS_CLIDR_EL1)] = clidr;
491+
}
492+
493+
static void test_vcpu_ftr_id_regs(struct kvm_vcpu *vcpu)
494+
{
495+
u64 val;
496+
497+
test_clidr(vcpu);
498+
499+
vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_MPIDR_EL1), &val);
500+
val++;
501+
vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_MPIDR_EL1), val);
502+
503+
test_reg_vals[encoding_to_range_idx(SYS_MPIDR_EL1)] = val;
504+
ksft_test_result_pass("%s\n", __func__);
505+
}
506+
507+
static void test_assert_id_reg_unchanged(struct kvm_vcpu *vcpu, uint32_t encoding)
508+
{
509+
size_t idx = encoding_to_range_idx(encoding);
510+
uint64_t observed;
511+
512+
vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(encoding), &observed);
513+
TEST_ASSERT_EQ(test_reg_vals[idx], observed);
514+
}
515+
516+
static void test_reset_preserves_id_regs(struct kvm_vcpu *vcpu)
517+
{
518+
/*
519+
* Calls KVM_ARM_VCPU_INIT behind the scenes, which will do an
520+
* architectural reset of the vCPU.
521+
*/
522+
aarch64_vcpu_setup(vcpu, NULL);
523+
524+
for (int i = 0; i < ARRAY_SIZE(test_regs); i++)
525+
test_assert_id_reg_unchanged(vcpu, test_regs[i].reg);
526+
527+
test_assert_id_reg_unchanged(vcpu, SYS_CLIDR_EL1);
528+
529+
ksft_test_result_pass("%s\n", __func__);
530+
}
531+
451532
int main(void)
452533
{
453534
struct kvm_vcpu *vcpu;
454535
struct kvm_vm *vm;
455536
bool aarch64_only;
456537
uint64_t val, el0;
457-
int ftr_cnt;
538+
int test_cnt;
458539

459540
TEST_REQUIRE(kvm_has_cap(KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES));
460541

@@ -467,18 +548,22 @@ int main(void)
467548

468549
ksft_print_header();
469550

470-
ftr_cnt = ARRAY_SIZE(ftr_id_aa64dfr0_el1) + ARRAY_SIZE(ftr_id_dfr0_el1) +
471-
ARRAY_SIZE(ftr_id_aa64isar0_el1) + ARRAY_SIZE(ftr_id_aa64isar1_el1) +
472-
ARRAY_SIZE(ftr_id_aa64isar2_el1) + ARRAY_SIZE(ftr_id_aa64pfr0_el1) +
473-
ARRAY_SIZE(ftr_id_aa64mmfr0_el1) + ARRAY_SIZE(ftr_id_aa64mmfr1_el1) +
474-
ARRAY_SIZE(ftr_id_aa64mmfr2_el1) + ARRAY_SIZE(ftr_id_aa64zfr0_el1) -
475-
ARRAY_SIZE(test_regs);
551+
test_cnt = ARRAY_SIZE(ftr_id_aa64dfr0_el1) + ARRAY_SIZE(ftr_id_dfr0_el1) +
552+
ARRAY_SIZE(ftr_id_aa64isar0_el1) + ARRAY_SIZE(ftr_id_aa64isar1_el1) +
553+
ARRAY_SIZE(ftr_id_aa64isar2_el1) + ARRAY_SIZE(ftr_id_aa64pfr0_el1) +
554+
ARRAY_SIZE(ftr_id_aa64mmfr0_el1) + ARRAY_SIZE(ftr_id_aa64mmfr1_el1) +
555+
ARRAY_SIZE(ftr_id_aa64mmfr2_el1) + ARRAY_SIZE(ftr_id_aa64zfr0_el1) -
556+
ARRAY_SIZE(test_regs) + 2;
476557

477-
ksft_set_plan(ftr_cnt);
558+
ksft_set_plan(test_cnt);
559+
560+
test_vm_ftr_id_regs(vcpu, aarch64_only);
561+
test_vcpu_ftr_id_regs(vcpu);
478562

479-
test_user_set_reg(vcpu, aarch64_only);
480563
test_guest_reg_read(vcpu);
481564

565+
test_reset_preserves_id_regs(vcpu);
566+
482567
kvm_vm_free(vm);
483568

484569
ksft_finished();

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