Skip to content

Commit eb1262e

Browse files
ruehlchrisbroonie
authored andcommitted
spi: spi-rockchip: use num-cs property and ctlr->enable_gpiods
The original implementation set num_chipselect to ROCKCHIP_SPI_MAX_CS_NUM (2) which seems wrong here. spi0 has 2 native cs, all others just one. With enable and use of cs_gpiods / GPIO CS, its correct to set the num_chipselect from the num-cs property and set max_native_cs with the define. If num-cs is missing the default set to num_chipselect = 1. Signed-off-by: Chris Ruehl <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
1 parent d065f41 commit eb1262e

File tree

1 file changed

+8
-1
lines changed

1 file changed

+8
-1
lines changed

drivers/spi/spi-rockchip.c

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -708,8 +708,15 @@ static int rockchip_spi_probe(struct platform_device *pdev)
708708
ctlr->slave_abort = rockchip_spi_slave_abort;
709709
} else {
710710
ctlr->flags = SPI_MASTER_GPIO_SS;
711+
ctlr->max_native_cs = ROCKCHIP_SPI_MAX_CS_NUM;
712+
/*
713+
* rk spi0 has two native cs, spi1..5 one cs only
714+
* if num-cs is missing in the dts, default to 1
715+
*/
716+
if (of_property_read_u16(np, "num-cs", &ctlr->num_chipselect))
717+
ctlr->num_chipselect = 1;
718+
ctlr->use_gpio_descriptors = true;
711719
}
712-
ctlr->num_chipselect = ROCKCHIP_SPI_MAX_CS_NUM;
713720
ctlr->dev.of_node = pdev->dev.of_node;
714721
ctlr->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8) | SPI_BPW_MASK(4);
715722
ctlr->min_speed_hz = rs->freq / BAUDR_SCKDV_MAX;

0 commit comments

Comments
 (0)