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sohilmehIngo Molnar
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x86/cpu/intel: Replace Family 5 model checks with VFM ones
Introduce names for some Family 5 models and convert some of the checks to be VFM based. Also, to keep the file sorted by family, move Family 5 to the top of the header file. Signed-off-by: Sohil Mehta <[email protected]> Signed-off-by: Ingo Molnar <[email protected]> Acked-by: Dave Hansen <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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-9
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arch/x86/include/asm/intel-family.h

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,12 @@
4545
/* Wildcard match so X86_MATCH_VFM(ANY) works */
4646
#define INTEL_ANY IFM(X86_FAMILY_ANY, X86_MODEL_ANY)
4747

48+
/* Family 5 */
49+
#define INTEL_FAM5_START IFM(5, 0x00) /* Notational marker, also P5 A-step */
50+
#define INTEL_PENTIUM_75 IFM(5, 0x02) /* P54C */
51+
#define INTEL_PENTIUM_MMX IFM(5, 0x04) /* P55C */
52+
#define INTEL_QUARK_X1000 IFM(5, 0x09) /* Quark X1000 SoC */
53+
4854
/* Family 6 */
4955
#define INTEL_PENTIUM_PRO IFM(6, 0x01)
5056
#define INTEL_PENTIUM_II_KLAMATH IFM(6, 0x03)
@@ -181,9 +187,6 @@
181187
#define INTEL_XEON_PHI_KNL IFM(6, 0x57) /* Knights Landing */
182188
#define INTEL_XEON_PHI_KNM IFM(6, 0x85) /* Knights Mill */
183189

184-
/* Family 5 */
185-
#define INTEL_QUARK_X1000 IFM(5, 0x09) /* Quark X1000 SoC */
186-
187190
/* Family 15 - NetBurst */
188191
#define INTEL_P4_WILLAMETTE IFM(15, 0x01) /* Also Xeon Foster */
189192
#define INTEL_P4_PRESCOTT IFM(15, 0x03)

arch/x86/kernel/cpu/intel.c

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -358,9 +358,8 @@ static void intel_smp_check(struct cpuinfo_x86 *c)
358358
/*
359359
* Mask B, Pentium, but not Pentium MMX
360360
*/
361-
if (c->x86 == 5 &&
362-
c->x86_stepping >= 1 && c->x86_stepping <= 4 &&
363-
c->x86_model <= 3) {
361+
if (c->x86_vfm >= INTEL_FAM5_START && c->x86_vfm < INTEL_PENTIUM_MMX &&
362+
c->x86_stepping >= 1 && c->x86_stepping <= 4) {
364363
/*
365364
* Remember we have B step Pentia with bugs
366365
*/
@@ -387,7 +386,7 @@ static void intel_workarounds(struct cpuinfo_x86 *c)
387386
* The Quark is also family 5, but does not have the same bug.
388387
*/
389388
clear_cpu_bug(c, X86_BUG_F00F);
390-
if (c->x86 == 5 && c->x86_model < 9) {
389+
if (c->x86_vfm >= INTEL_FAM5_START && c->x86_vfm < INTEL_QUARK_X1000) {
391390
static int f00f_workaround_enabled;
392391

393392
set_cpu_bug(c, X86_BUG_F00F);
@@ -435,7 +434,7 @@ static void intel_workarounds(struct cpuinfo_x86 *c)
435434
* integrated APIC (see 11AP erratum in "Pentium Processor
436435
* Specification Update").
437436
*/
438-
if (boot_cpu_has(X86_FEATURE_APIC) && (c->x86<<8 | c->x86_model<<4) == 0x520 &&
437+
if (boot_cpu_has(X86_FEATURE_APIC) && c->x86_vfm == INTEL_PENTIUM_75 &&
439438
(c->x86_stepping < 0x6 || c->x86_stepping == 0xb))
440439
set_cpu_bug(c, X86_BUG_11AP);
441440

@@ -612,7 +611,7 @@ static unsigned int intel_size_cache(struct cpuinfo_x86 *c, unsigned int size)
612611
* Intel Quark SoC X1000 contains a 4-way set associative
613612
* 16K cache with a 16 byte cache line and 256 lines per tag
614613
*/
615-
if ((c->x86 == 5) && (c->x86_model == 9))
614+
if (c->x86_vfm == INTEL_QUARK_X1000)
616615
size = 16;
617616
return size;
618617
}

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