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Merge tag 'qcom-arm64-fixes-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
Qualcomm Arm64 DeviceTree fixes for v6.11 On X1E the GPU node is disabled by default, to be enabled in the individual devices once the developers install the required firmware. The generic EDP panel driver used on the X1E CRD is replaced with the Samsung ATNA45AF01 driver, in order to ensure backlight is brought back up after being turned off. The pin configuration for PCIe-related pins are corrected across all the X1E targets. The PCIe controllers gain a minimum OPP vote, and PCIe domain numbers are corrected. WiFi calibration variant information is added to the Lenovo Yoga Slim 7x, to pick the right data from the firmware packages. The incorrect Adreno SMMU global interrupt is corrected. For IPQ5332, the IRQ triggers for the USB controller are corrected. * tag 'qcom-arm64-fixes-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (23 commits) arm64: dts: qcom: x1e80100: Fix Adreno SMMU global interrupt arm64: dts: qcom: disable GPU on x1e80100 by default arm64: dts: qcom: x1e80100-crd: Fix backlight arm64: dts: qcom: x1e80100-yoga-slim7x: fix missing PCIe4 gpios arm64: dts: qcom: x1e80100-yoga-slim7x: disable PCIe6a perst pull down arm64: dts: qcom: x1e80100-yoga-slim7x: fix up PCIe6a pinctrl node arm64: dts: qcom: x1e80100-yoga-slim7x: fix PCIe4 PHY supply arm64: dts: qcom: x1e80100-vivobook-s15: fix missing PCIe4 gpios arm64: dts: qcom: x1e80100-vivobook-s15: disable PCIe6a perst pull down arm64: dts: qcom: x1e80100-vivobook-s15: fix up PCIe6a pinctrl node arm64: dts: qcom: x1e80100-vivobook-s15: fix PCIe4 PHY supply arm64: dts: qcom: x1e80100-qcp: fix missing PCIe4 gpios arm64: dts: qcom: x1e80100-qcp: disable PCIe6a perst pull down arm64: dts: qcom: x1e80100-qcp: fix up PCIe6a pinctrl node arm64: dts: qcom: x1e80100-qcp: fix PCIe4 PHY supply arm64: dts: qcom: x1e80100-crd: fix missing PCIe4 gpios arm64: dts: qcom: x1e80100-crd: disable PCIe6a perst pull down arm64: dts: qcom: x1e80100-crd: fix up PCIe6a pinctrl node arm64: dts: qcom: x1e80100: add missing PCIe minimum OPP arm64: dts: qcom: x1e80100: fix PCIe domain numbers ... Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2 parents 015a00e + dfbe93f commit ec57571

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6 files changed

+209
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lines changed

‎arch/arm64/boot/dts/qcom/ipq5332.dtsi

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -320,8 +320,8 @@
320320
reg = <0x08af8800 0x400>;
321321

322322
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
323-
<GIC_SPI 53 IRQ_TYPE_EDGE_BOTH>,
324-
<GIC_SPI 52 IRQ_TYPE_EDGE_BOTH>;
323+
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
324+
<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
325325
interrupt-names = "pwr_event",
326326
"dp_hs_phy_irq",
327327
"dm_hs_phy_irq";

‎arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts

Lines changed: 39 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -278,6 +278,13 @@
278278
vdd-l3-supply = <&vreg_s1f_0p7>;
279279
vdd-s1-supply = <&vph_pwr>;
280280
vdd-s2-supply = <&vph_pwr>;
281+
282+
vreg_l3i_0p8: ldo3 {
283+
regulator-name = "vreg_l3i_0p8";
284+
regulator-min-microvolt = <880000>;
285+
regulator-max-microvolt = <920000>;
286+
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
287+
};
281288
};
282289

283290
regulators-7 {
@@ -423,11 +430,17 @@
423430
};
424431

425432
&pcie4 {
433+
perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
434+
wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
435+
436+
pinctrl-0 = <&pcie4_default>;
437+
pinctrl-names = "default";
438+
426439
status = "okay";
427440
};
428441

429442
&pcie4_phy {
430-
vdda-phy-supply = <&vreg_l3j_0p8>;
443+
vdda-phy-supply = <&vreg_l3i_0p8>;
431444
vdda-pll-supply = <&vreg_l3e_1p2>;
432445

433446
status = "okay";
@@ -517,7 +530,30 @@
517530
bias-disable;
518531
};
519532

520-
pcie6a_default: pcie2a-default-state {
533+
pcie4_default: pcie4-default-state {
534+
clkreq-n-pins {
535+
pins = "gpio147";
536+
function = "pcie4_clk";
537+
drive-strength = <2>;
538+
bias-pull-up;
539+
};
540+
541+
perst-n-pins {
542+
pins = "gpio146";
543+
function = "gpio";
544+
drive-strength = <2>;
545+
bias-disable;
546+
};
547+
548+
wake-n-pins {
549+
pins = "gpio148";
550+
function = "gpio";
551+
drive-strength = <2>;
552+
bias-pull-up;
553+
};
554+
};
555+
556+
pcie6a_default: pcie6a-default-state {
521557
clkreq-n-pins {
522558
pins = "gpio153";
523559
function = "pcie6a_clk";
@@ -529,7 +565,7 @@
529565
pins = "gpio152";
530566
function = "gpio";
531567
drive-strength = <2>;
532-
bias-pull-down;
568+
bias-disable;
533569
};
534570

535571
wake-n-pins {

‎arch/arm64/boot/dts/qcom/x1e80100-crd.dts

Lines changed: 60 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -268,7 +268,6 @@
268268
pinctrl-0 = <&edp_reg_en>;
269269
pinctrl-names = "default";
270270

271-
regulator-always-on;
272271
regulator-boot-on;
273272
};
274273

@@ -637,6 +636,14 @@
637636
};
638637
};
639638

639+
&gpu {
640+
status = "okay";
641+
642+
zap-shader {
643+
firmware-name = "qcom/x1e80100/gen70500_zap.mbn";
644+
};
645+
};
646+
640647
&i2c0 {
641648
clock-frequency = <400000>;
642649

@@ -724,9 +731,13 @@
724731

725732
aux-bus {
726733
panel {
727-
compatible = "edp-panel";
734+
compatible = "samsung,atna45af01", "samsung,atna33xc20";
735+
enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>;
728736
power-supply = <&vreg_edp_3p3>;
729737

738+
pinctrl-0 = <&edp_bl_en>;
739+
pinctrl-names = "default";
740+
730741
port {
731742
edp_panel_in: endpoint {
732743
remote-endpoint = <&mdss_dp3_out>;
@@ -756,11 +767,17 @@
756767
};
757768

758769
&pcie4 {
770+
perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
771+
wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
772+
773+
pinctrl-0 = <&pcie4_default>;
774+
pinctrl-names = "default";
775+
759776
status = "okay";
760777
};
761778

762779
&pcie4_phy {
763-
vdda-phy-supply = <&vreg_l3j_0p8>;
780+
vdda-phy-supply = <&vreg_l3i_0p8>;
764781
vdda-pll-supply = <&vreg_l3e_1p2>;
765782

766783
status = "okay";
@@ -785,6 +802,16 @@
785802
status = "okay";
786803
};
787804

805+
&pmc8380_3_gpios {
806+
edp_bl_en: edp-bl-en-state {
807+
pins = "gpio4";
808+
function = "normal";
809+
power-source = <1>; /* 1.8V */
810+
input-disable;
811+
output-enable;
812+
};
813+
};
814+
788815
&qupv3_0 {
789816
status = "okay";
790817
};
@@ -931,7 +958,30 @@
931958
bias-disable;
932959
};
933960

934-
pcie6a_default: pcie2a-default-state {
961+
pcie4_default: pcie4-default-state {
962+
clkreq-n-pins {
963+
pins = "gpio147";
964+
function = "pcie4_clk";
965+
drive-strength = <2>;
966+
bias-pull-up;
967+
};
968+
969+
perst-n-pins {
970+
pins = "gpio146";
971+
function = "gpio";
972+
drive-strength = <2>;
973+
bias-disable;
974+
};
975+
976+
wake-n-pins {
977+
pins = "gpio148";
978+
function = "gpio";
979+
drive-strength = <2>;
980+
bias-pull-up;
981+
};
982+
};
983+
984+
pcie6a_default: pcie6a-default-state {
935985
clkreq-n-pins {
936986
pins = "gpio153";
937987
function = "pcie6a_clk";
@@ -943,15 +993,15 @@
943993
pins = "gpio152";
944994
function = "gpio";
945995
drive-strength = <2>;
946-
bias-pull-down;
996+
bias-disable;
947997
};
948998

949999
wake-n-pins {
950-
pins = "gpio154";
951-
function = "gpio";
952-
drive-strength = <2>;
953-
bias-pull-up;
954-
};
1000+
pins = "gpio154";
1001+
function = "gpio";
1002+
drive-strength = <2>;
1003+
bias-pull-up;
1004+
};
9551005
};
9561006

9571007
tpad_default: tpad-default-state {

‎arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts

Lines changed: 46 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -625,16 +625,31 @@
625625
};
626626

627627
&pcie4 {
628+
perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
629+
wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
630+
631+
pinctrl-0 = <&pcie4_default>;
632+
pinctrl-names = "default";
633+
628634
status = "okay";
629635
};
630636

631637
&pcie4_phy {
632-
vdda-phy-supply = <&vreg_l3j_0p8>;
638+
vdda-phy-supply = <&vreg_l3i_0p8>;
633639
vdda-pll-supply = <&vreg_l3e_1p2>;
634640

635641
status = "okay";
636642
};
637643

644+
&pcie4_port0 {
645+
wifi@0 {
646+
compatible = "pci17cb,1107";
647+
reg = <0x10000 0x0 0x0 0x0 0x0>;
648+
649+
qcom,ath12k-calibration-variant = "LES790";
650+
};
651+
};
652+
638653
&pcie6a {
639654
perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
640655
wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
@@ -782,7 +797,30 @@
782797
bias-disable;
783798
};
784799

785-
pcie6a_default: pcie2a-default-state {
800+
pcie4_default: pcie4-default-state {
801+
clkreq-n-pins {
802+
pins = "gpio147";
803+
function = "pcie4_clk";
804+
drive-strength = <2>;
805+
bias-pull-up;
806+
};
807+
808+
perst-n-pins {
809+
pins = "gpio146";
810+
function = "gpio";
811+
drive-strength = <2>;
812+
bias-disable;
813+
};
814+
815+
wake-n-pins {
816+
pins = "gpio148";
817+
function = "gpio";
818+
drive-strength = <2>;
819+
bias-pull-up;
820+
};
821+
};
822+
823+
pcie6a_default: pcie6a-default-state {
786824
clkreq-n-pins {
787825
pins = "gpio153";
788826
function = "pcie6a_clk";
@@ -794,15 +832,15 @@
794832
pins = "gpio152";
795833
function = "gpio";
796834
drive-strength = <2>;
797-
bias-pull-down;
835+
bias-disable;
798836
};
799837

800838
wake-n-pins {
801-
pins = "gpio154";
802-
function = "gpio";
803-
drive-strength = <2>;
804-
bias-pull-up;
805-
};
839+
pins = "gpio154";
840+
function = "gpio";
841+
drive-strength = <2>;
842+
bias-pull-up;
843+
};
806844
};
807845

808846
tpad_default: tpad-default-state {

‎arch/arm64/boot/dts/qcom/x1e80100-qcp.dts

Lines changed: 45 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -606,6 +606,14 @@
606606
};
607607
};
608608

609+
&gpu {
610+
status = "okay";
611+
612+
zap-shader {
613+
firmware-name = "qcom/x1e80100/gen70500_zap.mbn";
614+
};
615+
};
616+
609617
&lpass_tlmm {
610618
spkr_01_sd_n_active: spkr-01-sd-n-active-state {
611619
pins = "gpio12";
@@ -660,11 +668,17 @@
660668
};
661669

662670
&pcie4 {
671+
perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
672+
wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
673+
674+
pinctrl-0 = <&pcie4_default>;
675+
pinctrl-names = "default";
676+
663677
status = "okay";
664678
};
665679

666680
&pcie4_phy {
667-
vdda-phy-supply = <&vreg_l3j_0p8>;
681+
vdda-phy-supply = <&vreg_l3i_0p8>;
668682
vdda-pll-supply = <&vreg_l3e_1p2>;
669683

670684
status = "okay";
@@ -804,7 +818,30 @@
804818
bias-disable;
805819
};
806820

807-
pcie6a_default: pcie2a-default-state {
821+
pcie4_default: pcie4-default-state {
822+
clkreq-n-pins {
823+
pins = "gpio147";
824+
function = "pcie4_clk";
825+
drive-strength = <2>;
826+
bias-pull-up;
827+
};
828+
829+
perst-n-pins {
830+
pins = "gpio146";
831+
function = "gpio";
832+
drive-strength = <2>;
833+
bias-disable;
834+
};
835+
836+
wake-n-pins {
837+
pins = "gpio148";
838+
function = "gpio";
839+
drive-strength = <2>;
840+
bias-pull-up;
841+
};
842+
};
843+
844+
pcie6a_default: pcie6a-default-state {
808845
clkreq-n-pins {
809846
pins = "gpio153";
810847
function = "pcie6a_clk";
@@ -816,15 +853,15 @@
816853
pins = "gpio152";
817854
function = "gpio";
818855
drive-strength = <2>;
819-
bias-pull-down;
856+
bias-disable;
820857
};
821858

822859
wake-n-pins {
823-
pins = "gpio154";
824-
function = "gpio";
825-
drive-strength = <2>;
826-
bias-pull-up;
827-
};
860+
pins = "gpio154";
861+
function = "gpio";
862+
drive-strength = <2>;
863+
bias-pull-up;
864+
};
828865
};
829866

830867
wcd_default: wcd-reset-n-active-state {

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