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drm: xlnx: zynqmp_dpsub: Move planes handling to zynqmp_kms.c
Decouple the planes handling from the display controller programming by moving the corresponding code from zynqmp_disp.c to zynqmp_kms.c. This prepares for using the DPSUB with a live video input, without creating DRM planes in the DPSUB driver. While at it, fix a typo in a comment. Signed-off-by: Laurent Pinchart <[email protected]>
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+167
-168
lines changed

4 files changed

+167
-168
lines changed

drivers/gpu/drm/xlnx/zynqmp_disp.c

Lines changed: 12 additions & 157 deletions
Original file line numberDiff line numberDiff line change
@@ -9,10 +9,6 @@
99
* - Laurent Pinchart <[email protected]>
1010
*/
1111

12-
#include <drm/drm_atomic.h>
13-
#include <drm/drm_atomic_helper.h>
14-
#include <drm/drm_blend.h>
15-
#include <drm/drm_device.h>
1612
#include <drm/drm_fb_dma_helper.h>
1713
#include <drm/drm_fourcc.h>
1814
#include <drm/drm_framebuffer.h>
@@ -141,7 +137,6 @@ struct zynqmp_disp_layer {
141137
/**
142138
* struct zynqmp_disp - Display controller
143139
* @dev: Device structure
144-
* @drm: DRM core
145140
* @dpsub: Display subsystem
146141
* @blend.base: Register I/O base address for the blender
147142
* @avbuf.base: Register I/O base address for the audio/video buffer manager
@@ -150,7 +145,6 @@ struct zynqmp_disp_layer {
150145
*/
151146
struct zynqmp_disp {
152147
struct device *dev;
153-
struct drm_device *drm;
154148
struct zynqmp_dpsub *dpsub;
155149

156150
struct {
@@ -380,11 +374,6 @@ static void zynqmp_disp_avbuf_write(struct zynqmp_disp *disp, int reg, u32 val)
380374
writel(val, disp->avbuf.base + reg);
381375
}
382376

383-
static bool zynqmp_disp_layer_is_gfx(const struct zynqmp_disp_layer *layer)
384-
{
385-
return layer->id == ZYNQMP_DPSUB_LAYER_GFX;
386-
}
387-
388377
static bool zynqmp_disp_layer_is_video(const struct zynqmp_disp_layer *layer)
389378
{
390379
return layer->id == ZYNQMP_DPSUB_LAYER_VID;
@@ -722,8 +711,8 @@ static void zynqmp_disp_blend_set_bg_color(struct zynqmp_disp *disp,
722711
* @enable: True to enable global alpha blending
723712
* @alpha: Global alpha value (ignored if @enabled is false)
724713
*/
725-
static void zynqmp_disp_blend_set_global_alpha(struct zynqmp_disp *disp,
726-
bool enable, u32 alpha)
714+
void zynqmp_disp_blend_set_global_alpha(struct zynqmp_disp *disp,
715+
bool enable, u32 alpha)
727716
{
728717
zynqmp_disp_blend_write(disp, ZYNQMP_DISP_V_BLEND_SET_GLOBAL_ALPHA,
729718
ZYNQMP_DISP_V_BLEND_SET_GLOBAL_ALPHA_VALUE(alpha) |
@@ -904,8 +893,8 @@ zynqmp_disp_layer_find_format(struct zynqmp_disp_layer *layer,
904893
* supported by the layer. The number of formats in the array is returned
905894
* through the num_formats argument.
906895
*/
907-
static u32 *zynqmp_disp_layer_drm_formats(struct zynqmp_disp_layer *layer,
908-
unsigned int *num_formats)
896+
u32 *zynqmp_disp_layer_drm_formats(struct zynqmp_disp_layer *layer,
897+
unsigned int *num_formats)
909898
{
910899
unsigned int i;
911900
u32 *formats;
@@ -929,7 +918,7 @@ static u32 *zynqmp_disp_layer_drm_formats(struct zynqmp_disp_layer *layer,
929918
* Enable the @layer in the audio/video buffer manager and the blender. DMA
930919
* channels are started separately by zynqmp_disp_layer_update().
931920
*/
932-
static void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer)
921+
void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer)
933922
{
934923
zynqmp_disp_avbuf_enable_video(layer->disp, layer,
935924
ZYNQMP_DISP_LAYER_NONLIVE);
@@ -945,7 +934,7 @@ static void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer)
945934
* Disable the layer by stopping its DMA channels and disabling it in the
946935
* audio/video buffer manager and the blender.
947936
*/
948-
static void zynqmp_disp_layer_disable(struct zynqmp_disp_layer *layer)
937+
void zynqmp_disp_layer_disable(struct zynqmp_disp_layer *layer)
949938
{
950939
unsigned int i;
951940

@@ -963,8 +952,8 @@ static void zynqmp_disp_layer_disable(struct zynqmp_disp_layer *layer)
963952
*
964953
* Set the format for @layer to @info. The layer must be disabled.
965954
*/
966-
static void zynqmp_disp_layer_set_format(struct zynqmp_disp_layer *layer,
967-
const struct drm_format_info *info)
955+
void zynqmp_disp_layer_set_format(struct zynqmp_disp_layer *layer,
956+
const struct drm_format_info *info)
968957
{
969958
unsigned int i;
970959

@@ -1002,8 +991,8 @@ static void zynqmp_disp_layer_set_format(struct zynqmp_disp_layer *layer,
1002991
*
1003992
* Return: 0 on success, or the DMA descriptor failure error otherwise
1004993
*/
1005-
static int zynqmp_disp_layer_update(struct zynqmp_disp_layer *layer,
1006-
struct drm_plane_state *state)
994+
int zynqmp_disp_layer_update(struct zynqmp_disp_layer *layer,
995+
struct drm_plane_state *state)
1007996
{
1008997
const struct drm_format_info *info = layer->drm_fmt;
1009998
unsigned int i;
@@ -1043,136 +1032,6 @@ static int zynqmp_disp_layer_update(struct zynqmp_disp_layer *layer,
10431032
return 0;
10441033
}
10451034

1046-
static int
1047-
zynqmp_disp_plane_atomic_check(struct drm_plane *plane,
1048-
struct drm_atomic_state *state)
1049-
{
1050-
struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
1051-
plane);
1052-
struct drm_crtc_state *crtc_state;
1053-
1054-
if (!new_plane_state->crtc)
1055-
return 0;
1056-
1057-
crtc_state = drm_atomic_get_crtc_state(state, new_plane_state->crtc);
1058-
if (IS_ERR(crtc_state))
1059-
return PTR_ERR(crtc_state);
1060-
1061-
return drm_atomic_helper_check_plane_state(new_plane_state,
1062-
crtc_state,
1063-
DRM_PLANE_NO_SCALING,
1064-
DRM_PLANE_NO_SCALING,
1065-
false, false);
1066-
}
1067-
1068-
void
1069-
zynqmp_disp_plane_atomic_disable(struct drm_plane *plane,
1070-
struct drm_atomic_state *state)
1071-
{
1072-
struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
1073-
plane);
1074-
struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(plane->dev);
1075-
struct zynqmp_disp_layer *layer = &dpsub->disp->layers[plane->index];
1076-
1077-
if (!old_state->fb)
1078-
return;
1079-
1080-
zynqmp_disp_layer_disable(layer);
1081-
1082-
if (zynqmp_disp_layer_is_gfx(layer))
1083-
zynqmp_disp_blend_set_global_alpha(layer->disp, false,
1084-
plane->state->alpha >> 8);
1085-
}
1086-
1087-
static void
1088-
zynqmp_disp_plane_atomic_update(struct drm_plane *plane,
1089-
struct drm_atomic_state *state)
1090-
{
1091-
struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);
1092-
struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);
1093-
struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(plane->dev);
1094-
struct zynqmp_disp_layer *layer = &dpsub->disp->layers[plane->index];
1095-
bool format_changed = false;
1096-
1097-
if (!old_state->fb ||
1098-
old_state->fb->format->format != new_state->fb->format->format)
1099-
format_changed = true;
1100-
1101-
/*
1102-
* If the format has changed (including going from a previously
1103-
* disabled state to any format), reconfigure the format. Disable the
1104-
* plane first if needed.
1105-
*/
1106-
if (format_changed) {
1107-
if (old_state->fb)
1108-
zynqmp_disp_layer_disable(layer);
1109-
1110-
zynqmp_disp_layer_set_format(layer, new_state->fb->format);
1111-
}
1112-
1113-
zynqmp_disp_layer_update(layer, new_state);
1114-
1115-
if (zynqmp_disp_layer_is_gfx(layer))
1116-
zynqmp_disp_blend_set_global_alpha(layer->disp, true,
1117-
plane->state->alpha >> 8);
1118-
1119-
/* Enable or re-enable the plane is the format has changed. */
1120-
if (format_changed)
1121-
zynqmp_disp_layer_enable(layer);
1122-
}
1123-
1124-
static const struct drm_plane_helper_funcs zynqmp_disp_plane_helper_funcs = {
1125-
.atomic_check = zynqmp_disp_plane_atomic_check,
1126-
.atomic_update = zynqmp_disp_plane_atomic_update,
1127-
.atomic_disable = zynqmp_disp_plane_atomic_disable,
1128-
};
1129-
1130-
static const struct drm_plane_funcs zynqmp_disp_plane_funcs = {
1131-
.update_plane = drm_atomic_helper_update_plane,
1132-
.disable_plane = drm_atomic_helper_disable_plane,
1133-
.destroy = drm_plane_cleanup,
1134-
.reset = drm_atomic_helper_plane_reset,
1135-
.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
1136-
.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
1137-
};
1138-
1139-
static int zynqmp_disp_create_planes(struct zynqmp_disp *disp)
1140-
{
1141-
unsigned int i;
1142-
int ret;
1143-
1144-
for (i = 0; i < ARRAY_SIZE(disp->layers); i++) {
1145-
struct zynqmp_disp_layer *layer = &disp->layers[i];
1146-
struct drm_plane *plane = &disp->dpsub->planes[i];
1147-
enum drm_plane_type type;
1148-
unsigned int num_formats;
1149-
u32 *formats;
1150-
1151-
formats = zynqmp_disp_layer_drm_formats(layer, &num_formats);
1152-
if (!formats)
1153-
return -ENOMEM;
1154-
1155-
/* Graphics layer is primary, and video layer is overlay. */
1156-
type = zynqmp_disp_layer_is_video(layer)
1157-
? DRM_PLANE_TYPE_OVERLAY : DRM_PLANE_TYPE_PRIMARY;
1158-
ret = drm_universal_plane_init(disp->drm, plane, 0,
1159-
&zynqmp_disp_plane_funcs,
1160-
formats, num_formats,
1161-
NULL, type, NULL);
1162-
kfree(formats);
1163-
if (ret)
1164-
return ret;
1165-
1166-
drm_plane_helper_add(plane, &zynqmp_disp_plane_helper_funcs);
1167-
1168-
drm_plane_create_zpos_immutable_property(plane, i);
1169-
if (zynqmp_disp_layer_is_gfx(layer))
1170-
drm_plane_create_alpha_property(plane);
1171-
}
1172-
1173-
return 0;
1174-
}
1175-
11761035
/**
11771036
* zynqmp_disp_layer_release_dma - Release DMA channels for a layer
11781037
* @disp: Display controller
@@ -1280,6 +1139,8 @@ static int zynqmp_disp_create_layers(struct zynqmp_disp *disp)
12801139
ret = zynqmp_disp_layer_request_dma(disp, layer);
12811140
if (ret)
12821141
goto err;
1142+
1143+
disp->dpsub->layers[i] = layer;
12831144
}
12841145

12851146
return 0;
@@ -1364,11 +1225,6 @@ int zynqmp_disp_setup_clock(struct zynqmp_disp *disp,
13641225
* Initialization & Cleanup
13651226
*/
13661227

1367-
int zynqmp_disp_drm_init(struct zynqmp_dpsub *dpsub)
1368-
{
1369-
return zynqmp_disp_create_planes(dpsub->disp);
1370-
}
1371-
13721228
int zynqmp_disp_probe(struct zynqmp_dpsub *dpsub, struct drm_device *drm)
13731229
{
13741230
struct platform_device *pdev = to_platform_device(dpsub->dev);
@@ -1383,7 +1239,6 @@ int zynqmp_disp_probe(struct zynqmp_dpsub *dpsub, struct drm_device *drm)
13831239

13841240
disp->dev = &pdev->dev;
13851241
disp->dpsub = dpsub;
1386-
disp->drm = drm;
13871242

13881243
dpsub->disp = disp;
13891244

drivers/gpu/drm/xlnx/zynqmp_disp.h

Lines changed: 14 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -25,11 +25,12 @@
2525
#define ZYNQMP_DISP_MAX_DMA_BIT 44
2626

2727
struct device;
28-
struct drm_atomic_state;
2928
struct drm_device;
30-
struct drm_plane;
29+
struct drm_format_info;
30+
struct drm_plane_state;
3131
struct platform_device;
3232
struct zynqmp_disp;
33+
struct zynqmp_disp_layer;
3334
struct zynqmp_dpsub;
3435

3536
/**
@@ -47,10 +48,18 @@ void zynqmp_disp_disable(struct zynqmp_disp *disp);
4748
int zynqmp_disp_setup_clock(struct zynqmp_disp *disp,
4849
unsigned long mode_clock);
4950

50-
void zynqmp_disp_plane_atomic_disable(struct drm_plane *plane,
51-
struct drm_atomic_state *state);
51+
void zynqmp_disp_blend_set_global_alpha(struct zynqmp_disp *disp,
52+
bool enable, u32 alpha);
53+
54+
u32 *zynqmp_disp_layer_drm_formats(struct zynqmp_disp_layer *layer,
55+
unsigned int *num_formats);
56+
void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer);
57+
void zynqmp_disp_layer_disable(struct zynqmp_disp_layer *layer);
58+
void zynqmp_disp_layer_set_format(struct zynqmp_disp_layer *layer,
59+
const struct drm_format_info *info);
60+
int zynqmp_disp_layer_update(struct zynqmp_disp_layer *layer,
61+
struct drm_plane_state *state);
5262

53-
int zynqmp_disp_drm_init(struct zynqmp_dpsub *dpsub);
5463
int zynqmp_disp_probe(struct zynqmp_dpsub *dpsub, struct drm_device *drm);
5564
void zynqmp_disp_remove(struct zynqmp_dpsub *dpsub);
5665

drivers/gpu/drm/xlnx/zynqmp_dpsub.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,7 @@ struct device;
2121
struct drm_bridge;
2222
struct drm_device;
2323
struct zynqmp_disp;
24+
struct zynqmp_disp_layer;
2425
struct zynqmp_dp;
2526

2627
#define ZYNQMP_DPSUB_NUM_LAYERS 2
@@ -65,6 +66,7 @@ struct zynqmp_dpsub {
6566
struct drm_bridge *bridge;
6667

6768
struct zynqmp_disp *disp;
69+
struct zynqmp_disp_layer *layers[ZYNQMP_DPSUB_NUM_LAYERS];
6870
struct zynqmp_dp *dp;
6971

7072
unsigned int dma_align;

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