drm/i915/hwmon: Enable PL1 power limit

ashutoshx · jnikula · commit ee892ea83d99 · 2023-03-13T11:38:05.000+02:00
Previous documentation suggested that PL1 power limit is always enabled. However we now find this not to be the case on some platforms (such as ATSM). Therefore enable PL1 power limit during hwmon initialization. Bspec: 51864 v2: Add Bspec reference (Gwan-gyeong) v3: Add Fixes tag Fixes: 99f55ef ("drm/i915/hwmon: Power PL1 limit and TDP setting") Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230203155309.1042297-1-ashutosh.dixit@intel.com (cherry picked from commit 0349c41) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
diff --git a/drivers/gpu/drm/i915/i915_hwmon.c b/drivers/gpu/drm/i915/i915_hwmon.c
@@ -687,6 +687,11 @@ hwm_get_preregistration_info(struct drm_i915_private *i915)
 		for_each_gt(gt, i915, i)
 			hwm_energy(&hwmon->ddat_gt[i], &energy);
 	}
+
+	/* Enable PL1 power limit */
+	if (i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit))
+		hwm_locked_with_pm_intel_uncore_rmw(ddat, hwmon->rg.pkg_rapl_limit,
+						    PKG_PWR_LIM_1_EN, PKG_PWR_LIM_1_EN);
 }
 
 void i915_hwmon_register(struct drm_i915_private *i915)

Original file line number	Diff line number	Diff line change
`@@ -687,6 +687,11 @@ hwm_get_preregistration_info(struct drm_i915_private *i915)`
`687`	`687`	`for_each_gt(gt, i915, i)`
`688`	`688`	`hwm_energy(&hwmon->ddat_gt[i], &energy);`
`689`	`689`	`}`
	`690`	`+`
	`691`	`+ /* Enable PL1 power limit */`
	`692`	`+ if (i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit))`
	`693`	`+ hwm_locked_with_pm_intel_uncore_rmw(ddat, hwmon->rg.pkg_rapl_limit,`
	`694`	`+ PKG_PWR_LIM_1_EN, PKG_PWR_LIM_1_EN);`
`690`	`695`	`}`
`691`	`696`
`692`	`697`	`void i915_hwmon_register(struct drm_i915_private *i915)`