Skip to content

Commit ee907af

Browse files
xdarklightbroonie
authored andcommitted
ASoC: meson: aiu: Move AIU_I2S_MISC hold setting to aiu-fifo-i2s
The out-of-tree vendor driver uses the following approach to set the AIU_I2S_MISC register: 1) write AIU_MEM_I2S_START_PTR and AIU_MEM_I2S_RD_PTR 2) configure AIU_I2S_MUTE_SWAP[15:0] 3) write AIU_MEM_I2S_END_PTR 4) set AIU_I2S_MISC[2] to 1 (documented as: "put I2S interface in hold mode") 5) set AIU_I2S_MISC[4] to 1 (depending on the driver revision it always stays at 1 while for older drivers this bit is unset in step 4) 6) set AIU_I2S_MISC[2] to 0 7) write AIU_MEM_I2S_MASKS 8) toggle AIU_MEM_I2S_CONTROL[0] 9) toggle AIU_MEM_I2S_BUF_CNTL[0] Move setting the AIU_I2S_MISC[2] bit to aiu_fifo_i2s_hw_params() so it resembles the flow in the vendor kernel more closely. While here also configure AIU_I2S_MISC[4] (documented as: "force each audio data to left or right according to the bit attached with the audio data") similar to how the vendor driver does this. This fixes the infamous and long-standing "machine gun noise" issue (a buffer underrun issue). Fixes: 6ae9ca9 ("ASoC: meson: aiu: add i2s and spdif support") Reported-by: Christian Hewitt <[email protected]> Reported-by: Geraldo Nascimento <[email protected]> Tested-by: Christian Hewitt <[email protected]> Tested-by: Geraldo Nascimento <[email protected]> Acked-by: Jerome Brunet <[email protected]> Cc: [email protected] Signed-off-by: Martin Blumenstingl <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
1 parent 1bcd326 commit ee907af

File tree

2 files changed

+19
-33
lines changed

2 files changed

+19
-33
lines changed

sound/soc/meson/aiu-encoder-i2s.c

Lines changed: 0 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,6 @@
1818
#define AIU_RST_SOFT_I2S_FAST BIT(0)
1919

2020
#define AIU_I2S_DAC_CFG_MSB_FIRST BIT(2)
21-
#define AIU_I2S_MISC_HOLD_EN BIT(2)
2221
#define AIU_CLK_CTRL_I2S_DIV_EN BIT(0)
2322
#define AIU_CLK_CTRL_I2S_DIV GENMASK(3, 2)
2423
#define AIU_CLK_CTRL_AOCLK_INVERT BIT(6)
@@ -36,37 +35,6 @@ static void aiu_encoder_i2s_divider_enable(struct snd_soc_component *component,
3635
enable ? AIU_CLK_CTRL_I2S_DIV_EN : 0);
3736
}
3837

39-
static void aiu_encoder_i2s_hold(struct snd_soc_component *component,
40-
bool enable)
41-
{
42-
snd_soc_component_update_bits(component, AIU_I2S_MISC,
43-
AIU_I2S_MISC_HOLD_EN,
44-
enable ? AIU_I2S_MISC_HOLD_EN : 0);
45-
}
46-
47-
static int aiu_encoder_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
48-
struct snd_soc_dai *dai)
49-
{
50-
struct snd_soc_component *component = dai->component;
51-
52-
switch (cmd) {
53-
case SNDRV_PCM_TRIGGER_START:
54-
case SNDRV_PCM_TRIGGER_RESUME:
55-
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
56-
aiu_encoder_i2s_hold(component, false);
57-
return 0;
58-
59-
case SNDRV_PCM_TRIGGER_STOP:
60-
case SNDRV_PCM_TRIGGER_SUSPEND:
61-
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
62-
aiu_encoder_i2s_hold(component, true);
63-
return 0;
64-
65-
default:
66-
return -EINVAL;
67-
}
68-
}
69-
7038
static int aiu_encoder_i2s_setup_desc(struct snd_soc_component *component,
7139
struct snd_pcm_hw_params *params)
7240
{
@@ -353,7 +321,6 @@ static void aiu_encoder_i2s_shutdown(struct snd_pcm_substream *substream,
353321
}
354322

355323
const struct snd_soc_dai_ops aiu_encoder_i2s_dai_ops = {
356-
.trigger = aiu_encoder_i2s_trigger,
357324
.hw_params = aiu_encoder_i2s_hw_params,
358325
.hw_free = aiu_encoder_i2s_hw_free,
359326
.set_fmt = aiu_encoder_i2s_set_fmt,

sound/soc/meson/aiu-fifo-i2s.c

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,8 @@
2020
#define AIU_MEM_I2S_CONTROL_MODE_16BIT BIT(6)
2121
#define AIU_MEM_I2S_BUF_CNTL_INIT BIT(0)
2222
#define AIU_RST_SOFT_I2S_FAST BIT(0)
23+
#define AIU_I2S_MISC_HOLD_EN BIT(2)
24+
#define AIU_I2S_MISC_FORCE_LEFT_RIGHT BIT(4)
2325

2426
#define AIU_FIFO_I2S_BLOCK 256
2527

@@ -90,6 +92,10 @@ static int aiu_fifo_i2s_hw_params(struct snd_pcm_substream *substream,
9092
unsigned int val;
9193
int ret;
9294

95+
snd_soc_component_update_bits(component, AIU_I2S_MISC,
96+
AIU_I2S_MISC_HOLD_EN,
97+
AIU_I2S_MISC_HOLD_EN);
98+
9399
ret = aiu_fifo_hw_params(substream, params, dai);
94100
if (ret)
95101
return ret;
@@ -117,6 +123,19 @@ static int aiu_fifo_i2s_hw_params(struct snd_pcm_substream *substream,
117123
snd_soc_component_update_bits(component, AIU_MEM_I2S_MASKS,
118124
AIU_MEM_I2S_MASKS_IRQ_BLOCK, val);
119125

126+
/*
127+
* Most (all?) supported SoCs have this bit set by default. The vendor
128+
* driver however sets it manually (depending on the version either
129+
* while un-setting AIU_I2S_MISC_HOLD_EN or right before that). Follow
130+
* the same approach for consistency with the vendor driver.
131+
*/
132+
snd_soc_component_update_bits(component, AIU_I2S_MISC,
133+
AIU_I2S_MISC_FORCE_LEFT_RIGHT,
134+
AIU_I2S_MISC_FORCE_LEFT_RIGHT);
135+
136+
snd_soc_component_update_bits(component, AIU_I2S_MISC,
137+
AIU_I2S_MISC_HOLD_EN, 0);
138+
120139
return 0;
121140
}
122141

0 commit comments

Comments
 (0)