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Anshuman Khandualctmarinas
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arm64/sysreg: Convert TRBLIMITR_EL1 register to automatic generation
This converts TRBLIMITR_EL1 register to automatic generation without causing any functional change. Cc: Will Deacon <[email protected]> Cc: Marc Zyngier <[email protected]> Cc: Mark Brown <[email protected]> Cc: Rob Herring <[email protected]> Cc: Suzuki K Poulose <[email protected]> Cc: James Morse <[email protected]> Cc: [email protected] Cc: [email protected] Reviewed-by: Mark Brown <[email protected]> Signed-off-by: Anshuman Khandual <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Catalin Marinas <[email protected]>
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arch/arm64/include/asm/sysreg.h

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Original file line numberDiff line numberDiff line change
@@ -227,25 +227,13 @@
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/*** End of Statistical Profiling Extension ***/
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/*
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* TRBE Registers
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*/
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#define SYS_TRBLIMITR_EL1 sys_reg(3, 0, 9, 11, 0)
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#define SYS_TRBPTR_EL1 sys_reg(3, 0, 9, 11, 1)
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#define SYS_TRBBASER_EL1 sys_reg(3, 0, 9, 11, 2)
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#define SYS_TRBSR_EL1 sys_reg(3, 0, 9, 11, 3)
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#define SYS_TRBMAR_EL1 sys_reg(3, 0, 9, 11, 4)
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#define SYS_TRBTRG_EL1 sys_reg(3, 0, 9, 11, 6)
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#define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7)
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241-
#define TRBLIMITR_EL1_LIMIT_MASK GENMASK_ULL(63, 12)
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#define TRBLIMITR_EL1_LIMIT_SHIFT 12
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#define TRBLIMITR_EL1_nVM BIT(5)
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#define TRBLIMITR_EL1_TM_MASK GENMASK(4, 3)
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#define TRBLIMITR_EL1_TM_SHIFT 3
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#define TRBLIMITR_EL1_FM_MASK GENMASK(2, 1)
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#define TRBLIMITR_EL1_FM_SHIFT 1
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#define TRBLIMITR_EL1_E BIT(0)
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#define TRBPTR_EL1_PTR_MASK GENMASK_ULL(63, 0)
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#define TRBPTR_EL1_PTR_SHIFT 0
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#define TRBBASER_EL1_BASE_MASK GENMASK_ULL(63, 12)

arch/arm64/tools/sysreg

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Original file line numberDiff line numberDiff line change
@@ -2255,3 +2255,21 @@ Sysreg ICC_NMIAR1_EL1 3 0 12 9 5
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Res0 63:24
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Field 23:0 INTID
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EndSysreg
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Sysreg TRBLIMITR_EL1 3 0 9 11 0
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Field 63:12 LIMIT
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Res0 11:7
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Field 6 XE
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Field 5 nVM
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Enum 4:3 TM
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0b00 STOP
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0b01 IRQ
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0b11 IGNR
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EndEnum
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Enum 2:1 FM
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0b00 FILL
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0b01 WRAP
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0b11 CBUF
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EndEnum
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Field 0 E
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EndSysreg

drivers/hwtracing/coresight/coresight-trbe.h

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Original file line numberDiff line numberDiff line change
@@ -84,15 +84,6 @@ static inline bool is_trbe_running(u64 trbsr)
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return !(trbsr & TRBSR_EL1_S);
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}
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#define TRBE_TRIG_MODE_STOP 0
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#define TRBE_TRIG_MODE_IRQ 1
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#define TRBLIMITR_EL1_TM_IGNR 3
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#define TRBLIMITR_EL1_FM_FILL 0
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#define TRBE_FILL_MODE_FILL 0
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#define TRBE_FILL_MODE_WRAP 1
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#define TRBE_FILL_MODE_CIRCULAR_BUFFER 3
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static inline bool get_trbe_flag_update(u64 trbidr)
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{
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return trbidr & TRBIDR_EL1_F;

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