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Merge tag 'tegra-for-6.16-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
ARM: tegra: Device tree changes for v6.16-rc1 Use standard names for the APBDMA controller device tree nodes, add support for the ASUS Transformer Pad LTE TF300TL and clean up the Apalis evaluation board by removing the unused pcie-switch node. * tag 'tegra-for-6.16-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: apalis-eval: Remove pcie-switch node ARM: tegra: Add device-tree for ASUS Transformer Pad LTE TF300TL ARM: tegra: Rename the apbdma nodename to match with common dma-controller binding Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
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arch/arm/boot/dts/nvidia/Makefile

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@@ -34,6 +34,7 @@ dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += \
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tegra30-asus-tf201.dtb \
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tegra30-asus-tf300t.dtb \
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tegra30-asus-tf300tg.dtb \
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tegra30-asus-tf300tl.dtb \
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tegra30-asus-tf700t.dtb \
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tegra30-beaver.dtb \
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tegra30-cardhu-a02.dtb \

arch/arm/boot/dts/nvidia/tegra124-apalis-eval.dts

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@@ -84,11 +84,6 @@
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status = "okay";
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clock-frequency = <400000>;
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pcie-switch@58 {
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compatible = "plx,pex8605";
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reg = <0x58>;
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};
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/* M41T0M6 real time clock on carrier board */
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rtc@68 {
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compatible = "st,m41t0";

arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts

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status = "okay";
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clock-frequency = <400000>;
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pcie-switch@58 {
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compatible = "plx,pex8605";
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reg = <0x58>;
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};
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/* M41T0M6 real time clock on carrier board */
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rtc@68 {
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compatible = "st,m41t0";

arch/arm/boot/dts/nvidia/tegra20.dtsi

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reg = <0x60007000 0x1000>;
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};
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apbdma: dma@6000a000 {
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apbdma: dma-controller@6000a000 {
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compatible = "nvidia,tegra20-apbdma";
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reg = <0x6000a000 0x1200>;
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interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,

arch/arm/boot/dts/nvidia/tegra30-apalis-eval.dts

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status = "okay";
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clock-frequency = <400000>;
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pcie-switch@58 {
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compatible = "plx,pex8605";
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reg = <0x58>;
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};
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/* M41T0M6 real time clock on carrier board */
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rtc@68 {
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compatible = "st,m41t0";

arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts

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status = "okay";
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clock-frequency = <400000>;
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pcie-switch@58 {
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compatible = "plx,pex8605";
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reg = <0x58>;
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};
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/* M41T0M6 real time clock on carrier board */
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rtc@68 {
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compatible = "st,m41t0";

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