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27 | 27 | #define UARTA_72165 UARTA_7278
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28 | 28 | #define UARTA_7364 REG_PHYS_ADDR(0x40b000)
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29 | 29 | #define UARTA_7366 UARTA_7364
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| 30 | +#define UARTA_74165 UARTA_7278 |
30 | 31 | #define UARTA_74371 REG_PHYS_ADDR(0x406b00)
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31 | 32 | #define UARTA_7439 REG_PHYS_ADDR(0x40a900)
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32 | 33 | #define UARTA_7445 REG_PHYS_ADDR(0x40ab00)
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@@ -88,9 +89,10 @@ ARM_BE8( rev \rv, \rv )
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88 | 89 | 30: checkuart(\rp, \rv, 0x72780000, 7278)
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89 | 90 | 31: checkuart(\rp, \rv, 0x73640000, 7364)
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90 | 91 | 32: checkuart(\rp, \rv, 0x73660000, 7366)
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91 |
| -33: checkuart(\rp, \rv, 0x07437100, 74371) |
92 |
| -34: checkuart(\rp, \rv, 0x74390000, 7439) |
93 |
| -35: checkuart(\rp, \rv, 0x74450000, 7445) |
| 92 | +33: checkuart(\rp, \rv, 0x07416500, 74165) |
| 93 | +34: checkuart(\rp, \rv, 0x07437100, 74371) |
| 94 | +35: checkuart(\rp, \rv, 0x74390000, 7439) |
| 95 | +36: checkuart(\rp, \rv, 0x74450000, 7445) |
94 | 96 |
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95 | 97 | /* No valid UART found */
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96 | 98 | 90: mov \rp, #0
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