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8 | 8 |
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9 | 9 | #include <linux/clk.h>
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10 | 10 | #include <linux/init.h>
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| 11 | +#include <linux/io.h> |
11 | 12 | #include <linux/math64.h>
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12 | 13 | #include <linux/of.h>
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13 | 14 | #include <linux/of_address.h>
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22 | 23 | #define NEMC_SMCRn(n) (0x14 + (((n) - 1) * 4))
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23 | 24 | #define NEMC_NFCSR 0x50
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24 | 25 |
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| 26 | +#define NEMC_REG_LEN 0x54 |
| 27 | + |
25 | 28 | #define NEMC_SMCR_SMT BIT(0)
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26 | 29 | #define NEMC_SMCR_BW_SHIFT 6
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27 | 30 | #define NEMC_SMCR_BW_MASK (0x3 << NEMC_SMCR_BW_SHIFT)
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@@ -288,7 +291,19 @@ static int jz4780_nemc_probe(struct platform_device *pdev)
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288 | 291 | nemc->dev = dev;
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289 | 292 |
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290 | 293 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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291 |
| - nemc->base = devm_ioremap_resource(dev, res); |
| 294 | + |
| 295 | + /* |
| 296 | + * The driver currently only uses the registers up to offset |
| 297 | + * NEMC_REG_LEN. Since the EFUSE registers are in the middle of the |
| 298 | + * NEMC registers, we only request the registers we will use for now; |
| 299 | + * that way the EFUSE driver can probe too. |
| 300 | + */ |
| 301 | + if (!devm_request_mem_region(dev, res->start, NEMC_REG_LEN, dev_name(dev))) { |
| 302 | + dev_err(dev, "unable to request I/O memory region\n"); |
| 303 | + return -EBUSY; |
| 304 | + } |
| 305 | + |
| 306 | + nemc->base = devm_ioremap(dev, res->start, NEMC_REG_LEN); |
292 | 307 | if (IS_ERR(nemc->base)) {
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293 | 308 | dev_err(dev, "failed to get I/O memory\n");
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294 | 309 | return PTR_ERR(nemc->base);
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