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MIPS: retire "asm/llsc.h"
all that "asm/llsc.h" does is just to help inline asm, which can be stringifyed from "asm/asm.h" +. Since "asm/asm.h" has all we need, retire "asm/llsc.h" +. remove unused header file Inspired-by: Maciej W. Rozycki <[email protected]> Signed-off-by: Huang Pei <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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6 files changed

+31
-69
lines changed

6 files changed

+31
-69
lines changed

‎arch/mips/include/asm/asm.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -222,6 +222,8 @@ symbol = value
222222
#define LONG_SRLV srlv
223223
#define LONG_SRA sra
224224
#define LONG_SRAV srav
225+
#define LONG_INS ins
226+
#define LONG_EXT ext
225227

226228
#ifdef __ASSEMBLY__
227229
#define LONG .word
@@ -249,6 +251,8 @@ symbol = value
249251
#define LONG_SRLV dsrlv
250252
#define LONG_SRA dsra
251253
#define LONG_SRAV dsrav
254+
#define LONG_INS dins
255+
#define LONG_EXT dext
252256

253257
#ifdef __ASSEMBLY__
254258
#define LONG .dword

‎arch/mips/include/asm/atomic.h

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -16,13 +16,12 @@
1616

1717
#include <linux/irqflags.h>
1818
#include <linux/types.h>
19+
#include <asm/asm.h>
1920
#include <asm/barrier.h>
2021
#include <asm/compiler.h>
2122
#include <asm/cpu-features.h>
2223
#include <asm/cmpxchg.h>
23-
#include <asm/llsc.h>
2424
#include <asm/sync.h>
25-
#include <asm/war.h>
2625

2726
#define ATOMIC_OPS(pfx, type) \
2827
static __always_inline type arch_##pfx##_read(const pfx##_t *v) \
@@ -74,7 +73,7 @@ static __inline__ void arch_##pfx##_##op(type i, pfx##_t * v) \
7473
"1: " #ll " %0, %1 # " #pfx "_" #op " \n" \
7574
" " #asm_op " %0, %2 \n" \
7675
" " #sc " %0, %1 \n" \
77-
"\t" __SC_BEQZ "%0, 1b \n" \
76+
"\t" __stringify(SC_BEQZ) " %0, 1b \n" \
7877
" .set pop \n" \
7978
: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
8079
: "Ir" (i) : __LLSC_CLOBBER); \
@@ -104,7 +103,7 @@ arch_##pfx##_##op##_return_relaxed(type i, pfx##_t * v) \
104103
"1: " #ll " %1, %2 # " #pfx "_" #op "_return\n" \
105104
" " #asm_op " %0, %1, %3 \n" \
106105
" " #sc " %0, %2 \n" \
107-
"\t" __SC_BEQZ "%0, 1b \n" \
106+
"\t" __stringify(SC_BEQZ) " %0, 1b \n" \
108107
" " #asm_op " %0, %1, %3 \n" \
109108
" .set pop \n" \
110109
: "=&r" (result), "=&r" (temp), \
@@ -137,7 +136,7 @@ arch_##pfx##_fetch_##op##_relaxed(type i, pfx##_t * v) \
137136
"1: " #ll " %1, %2 # " #pfx "_fetch_" #op "\n" \
138137
" " #asm_op " %0, %1, %3 \n" \
139138
" " #sc " %0, %2 \n" \
140-
"\t" __SC_BEQZ "%0, 1b \n" \
139+
"\t" __stringify(SC_BEQZ) " %0, 1b \n" \
141140
" .set pop \n" \
142141
" move %0, %1 \n" \
143142
: "=&r" (result), "=&r" (temp), \
@@ -237,7 +236,7 @@ static __inline__ type arch_##pfx##_sub_if_positive(type i, pfx##_t * v) \
237236
" .set push \n" \
238237
" .set " MIPS_ISA_LEVEL " \n" \
239238
" " #sc " %1, %2 \n" \
240-
" " __SC_BEQZ "%1, 1b \n" \
239+
" " __stringify(SC_BEQZ) " %1, 1b \n" \
241240
"2: " __SYNC(full, loongson3_war) " \n" \
242241
" .set pop \n" \
243242
: "=&r" (result), "=&r" (temp), \

‎arch/mips/include/asm/bitops.h

Lines changed: 11 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -16,14 +16,12 @@
1616
#include <linux/bits.h>
1717
#include <linux/compiler.h>
1818
#include <linux/types.h>
19+
#include <asm/asm.h>
1920
#include <asm/barrier.h>
2021
#include <asm/byteorder.h> /* sigh ... */
2122
#include <asm/compiler.h>
2223
#include <asm/cpu-features.h>
23-
#include <asm/isa-rev.h>
24-
#include <asm/llsc.h>
2524
#include <asm/sgidefs.h>
26-
#include <asm/war.h>
2725

2826
#define __bit_op(mem, insn, inputs...) do { \
2927
unsigned long __temp; \
@@ -32,10 +30,10 @@
3230
" .set push \n" \
3331
" .set " MIPS_ISA_LEVEL " \n" \
3432
" " __SYNC(full, loongson3_war) " \n" \
35-
"1: " __LL "%0, %1 \n" \
33+
"1: " __stringify(LONG_LL) " %0, %1 \n" \
3634
" " insn " \n" \
37-
" " __SC "%0, %1 \n" \
38-
" " __SC_BEQZ "%0, 1b \n" \
35+
" " __stringify(LONG_SC) " %0, %1 \n" \
36+
" " __stringify(SC_BEQZ) " %0, 1b \n" \
3937
" .set pop \n" \
4038
: "=&r"(__temp), "+" GCC_OFF_SMALL_ASM()(mem) \
4139
: inputs \
@@ -49,10 +47,10 @@
4947
" .set push \n" \
5048
" .set " MIPS_ISA_LEVEL " \n" \
5149
" " __SYNC(full, loongson3_war) " \n" \
52-
"1: " __LL ll_dst ", %2 \n" \
50+
"1: " __stringify(LONG_LL) " " ll_dst ", %2\n" \
5351
" " insn " \n" \
54-
" " __SC "%1, %2 \n" \
55-
" " __SC_BEQZ "%1, 1b \n" \
52+
" " __stringify(LONG_SC) " %1, %2 \n" \
53+
" " __stringify(SC_BEQZ) " %1, 1b \n" \
5654
" .set pop \n" \
5755
: "=&r"(__orig), "=&r"(__temp), \
5856
"+" GCC_OFF_SMALL_ASM()(mem) \
@@ -98,7 +96,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
9896
}
9997

10098
if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(bit) && (bit >= 16)) {
101-
__bit_op(*m, __INS "%0, %3, %2, 1", "i"(bit), "r"(~0));
99+
__bit_op(*m, __stringify(LONG_INS) " %0, %3, %2, 1", "i"(bit), "r"(~0));
102100
return;
103101
}
104102

@@ -126,7 +124,7 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
126124
}
127125

128126
if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(bit)) {
129-
__bit_op(*m, __INS "%0, $0, %2, 1", "i"(bit));
127+
__bit_op(*m, __stringify(LONG_INS) " %0, $0, %2, 1", "i"(bit));
130128
return;
131129
}
132130

@@ -234,8 +232,8 @@ static inline int test_and_clear_bit(unsigned long nr,
234232
res = __mips_test_and_clear_bit(nr, addr);
235233
} else if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(nr)) {
236234
res = __test_bit_op(*m, "%1",
237-
__EXT "%0, %1, %3, 1;"
238-
__INS "%1, $0, %3, 1",
235+
__stringify(LONG_EXT) " %0, %1, %3, 1;"
236+
__stringify(LONG_INS) " %1, $0, %3, 1",
239237
"i"(bit));
240238
} else {
241239
orig = __test_bit_op(*m, "%0",

‎arch/mips/include/asm/cmpxchg.h

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -10,10 +10,9 @@
1010

1111
#include <linux/bug.h>
1212
#include <linux/irqflags.h>
13+
#include <asm/asm.h>
1314
#include <asm/compiler.h>
14-
#include <asm/llsc.h>
1515
#include <asm/sync.h>
16-
#include <asm/war.h>
1716

1817
/*
1918
* These functions doesn't exist, so if they are called you'll either:
@@ -48,7 +47,7 @@ extern unsigned long __xchg_called_with_bad_pointer(void)
4847
" move $1, %z3 \n" \
4948
" .set " MIPS_ISA_ARCH_LEVEL " \n" \
5049
" " st " $1, %1 \n" \
51-
"\t" __SC_BEQZ "$1, 1b \n" \
50+
"\t" __stringify(SC_BEQZ) " $1, 1b \n" \
5251
" .set pop \n" \
5352
: "=&r" (__ret), "=" GCC_OFF_SMALL_ASM() (*m) \
5453
: GCC_OFF_SMALL_ASM() (*m), "Jr" (val) \
@@ -127,7 +126,7 @@ unsigned long __xchg(volatile void *ptr, unsigned long x, int size)
127126
" move $1, %z4 \n" \
128127
" .set "MIPS_ISA_ARCH_LEVEL" \n" \
129128
" " st " $1, %1 \n" \
130-
"\t" __SC_BEQZ "$1, 1b \n" \
129+
"\t" __stringify(SC_BEQZ) " $1, 1b \n" \
131130
" .set pop \n" \
132131
"2: " __SYNC(full, loongson3_war) " \n" \
133132
: "=&r" (__ret), "=" GCC_OFF_SMALL_ASM() (*m) \
@@ -282,7 +281,7 @@ static inline unsigned long __cmpxchg64(volatile void *ptr,
282281
/* Attempt to store new at ptr */
283282
" scd %L1, %2 \n"
284283
/* If we failed, loop! */
285-
"\t" __SC_BEQZ "%L1, 1b \n"
284+
"\t" __stringify(SC_BEQZ) " %L1, 1b \n"
286285
"2: " __SYNC(full, loongson3_war) " \n"
287286
" .set pop \n"
288287
: "=&r"(ret),

‎arch/mips/include/asm/kvm_host.h

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@
2020
#include <linux/threads.h>
2121
#include <linux/spinlock.h>
2222

23+
#include <asm/asm.h>
2324
#include <asm/inst.h>
2425
#include <asm/mipsregs.h>
2526

@@ -379,9 +380,9 @@ static inline void _kvm_atomic_set_c0_guest_reg(unsigned long *reg,
379380
__asm__ __volatile__(
380381
" .set push \n"
381382
" .set "MIPS_ISA_ARCH_LEVEL" \n"
382-
" " __LL "%0, %1 \n"
383+
" "__stringify(LONG_LL) " %0, %1 \n"
383384
" or %0, %2 \n"
384-
" " __SC "%0, %1 \n"
385+
" "__stringify(LONG_SC) " %0, %1 \n"
385386
" .set pop \n"
386387
: "=&r" (temp), "+m" (*reg)
387388
: "r" (val));
@@ -396,9 +397,9 @@ static inline void _kvm_atomic_clear_c0_guest_reg(unsigned long *reg,
396397
__asm__ __volatile__(
397398
" .set push \n"
398399
" .set "MIPS_ISA_ARCH_LEVEL" \n"
399-
" " __LL "%0, %1 \n"
400+
" "__stringify(LONG_LL) " %0, %1 \n"
400401
" and %0, %2 \n"
401-
" " __SC "%0, %1 \n"
402+
" "__stringify(LONG_SC) " %0, %1 \n"
402403
" .set pop \n"
403404
: "=&r" (temp), "+m" (*reg)
404405
: "r" (~val));
@@ -414,10 +415,10 @@ static inline void _kvm_atomic_change_c0_guest_reg(unsigned long *reg,
414415
__asm__ __volatile__(
415416
" .set push \n"
416417
" .set "MIPS_ISA_ARCH_LEVEL" \n"
417-
" " __LL "%0, %1 \n"
418+
" "__stringify(LONG_LL) " %0, %1 \n"
418419
" and %0, %2 \n"
419420
" or %0, %3 \n"
420-
" " __SC "%0, %1 \n"
421+
" "__stringify(LONG_SC) " %0, %1 \n"
421422
" .set pop \n"
422423
: "=&r" (temp), "+m" (*reg)
423424
: "r" (~change), "r" (val & change));

‎arch/mips/include/asm/llsc.h

Lines changed: 0 additions & 39 deletions
This file was deleted.

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