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#define RCAR_IRQ_STOP (MST)
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#define ID_LAST_MSG BIT(0)
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+ #define ID_REP_AFTER_RD BIT(1)
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#define ID_DONE BIT(2)
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#define ID_ARBLOST BIT(3)
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#define ID_NACK BIT(4)
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#define ID_EPROTO BIT(5)
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/* persistent flags */
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- #define ID_P_HOST_NOTIFY BIT(28)
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- #define ID_P_REP_AFTER_RD BIT(29)
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+ #define ID_P_HOST_NOTIFY BIT(29)
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#define ID_P_NO_RXDMA BIT(30) /* HW forbids RXDMA sometimes */
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#define ID_P_PM_BLOCKED BIT(31)
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- #define ID_P_MASK GENMASK(31, 28 )
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+ #define ID_P_MASK GENMASK(31, 29 )
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enum rcar_i2c_type {
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I2C_RCAR_GEN1 ,
@@ -341,6 +341,7 @@ static int rcar_i2c_clock_calculate(struct rcar_i2c_priv *priv)
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static void rcar_i2c_prepare_msg (struct rcar_i2c_priv * priv )
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{
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int read = !!rcar_i2c_is_recv (priv );
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+ bool rep_start = !(priv -> flags & ID_REP_AFTER_RD );
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priv -> pos = 0 ;
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priv -> flags &= ID_P_MASK ;
@@ -352,9 +353,7 @@ static void rcar_i2c_prepare_msg(struct rcar_i2c_priv *priv)
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if (!priv -> atomic_xfer )
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rcar_i2c_write (priv , ICMIER , read ? RCAR_IRQ_RECV : RCAR_IRQ_SEND );
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- if (priv -> flags & ID_P_REP_AFTER_RD )
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- priv -> flags &= ~ID_P_REP_AFTER_RD ;
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- else
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+ if (rep_start )
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rcar_i2c_write (priv , ICMCR , RCAR_BUS_PHASE_START );
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}
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@@ -575,7 +574,7 @@ static void rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr)
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rcar_i2c_write (priv , ICMCR , RCAR_BUS_PHASE_STOP );
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} else {
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rcar_i2c_write (priv , ICMCR , RCAR_BUS_PHASE_START );
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- priv -> flags |= ID_P_REP_AFTER_RD ;
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+ priv -> flags |= ID_REP_AFTER_RD ;
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}
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}
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@@ -706,7 +705,7 @@ static irqreturn_t rcar_i2c_gen2_irq(int irq, void *ptr)
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u32 msr ;
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/* Clear START or STOP immediately, except for REPSTART after read */
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- if (likely (!(priv -> flags & ID_P_REP_AFTER_RD )))
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+ if (likely (!(priv -> flags & ID_REP_AFTER_RD )))
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rcar_i2c_write (priv , ICMCR , RCAR_BUS_PHASE_DATA );
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/* Only handle interrupts that are currently enabled */
@@ -731,7 +730,7 @@ static irqreturn_t rcar_i2c_gen3_irq(int irq, void *ptr)
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* Clear START or STOP immediately, except for REPSTART after read or
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* if a spurious interrupt was detected.
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*/
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- if (likely (!(priv -> flags & ID_P_REP_AFTER_RD ) && msr ))
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+ if (likely (!(priv -> flags & ID_REP_AFTER_RD ) && msr ))
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rcar_i2c_write (priv , ICMCR , RCAR_BUS_PHASE_DATA );
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return rcar_i2c_irq (irq , priv , msr );
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