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| 1 | +// SPDX-License-Identifier: BSD-3-Clause |
| 2 | +/* |
| 3 | + * IPQ5332 RDP468 board device tree source |
| 4 | + * |
| 5 | + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. |
| 6 | + */ |
| 7 | + |
| 8 | +/dts-v1/; |
| 9 | + |
| 10 | +#include "ipq5332.dtsi" |
| 11 | + |
| 12 | +/ { |
| 13 | + model = "Qualcomm Technologies, Inc. IPQ5332 MI01.6"; |
| 14 | + compatible = "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332"; |
| 15 | + |
| 16 | + aliases { |
| 17 | + serial0 = &blsp1_uart0; |
| 18 | + }; |
| 19 | + |
| 20 | + chosen { |
| 21 | + stdout-path = "serial0"; |
| 22 | + }; |
| 23 | +}; |
| 24 | + |
| 25 | +&blsp1_uart0 { |
| 26 | + pinctrl-0 = <&serial_0_pins>; |
| 27 | + pinctrl-names = "default"; |
| 28 | + status = "okay"; |
| 29 | +}; |
| 30 | + |
| 31 | +&blsp1_spi0 { |
| 32 | + pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>; |
| 33 | + pinctrl-names = "default"; |
| 34 | + status = "okay"; |
| 35 | + |
| 36 | + flash@0 { |
| 37 | + compatible = "micron,n25q128a11", "jedec,spi-nor"; |
| 38 | + reg = <0>; |
| 39 | + #address-cells = <1>; |
| 40 | + #size-cells = <1>; |
| 41 | + spi-max-frequency = <50000000>; |
| 42 | + }; |
| 43 | +}; |
| 44 | + |
| 45 | +&sdhc { |
| 46 | + bus-width = <4>; |
| 47 | + max-frequency = <192000000>; |
| 48 | + mmc-ddr-1_8v; |
| 49 | + mmc-hs200-1_8v; |
| 50 | + non-removable; |
| 51 | + pinctrl-0 = <&sdc_default_state>; |
| 52 | + pinctrl-names = "default"; |
| 53 | + status = "okay"; |
| 54 | +}; |
| 55 | + |
| 56 | +&sleep_clk { |
| 57 | + clock-frequency = <32000>; |
| 58 | +}; |
| 59 | + |
| 60 | +&xo_board { |
| 61 | + clock-frequency = <24000000>; |
| 62 | +}; |
| 63 | + |
| 64 | +/* PINCTRL */ |
| 65 | + |
| 66 | +&tlmm { |
| 67 | + sdc_default_state: sdc-default-state { |
| 68 | + clk-pins { |
| 69 | + pins = "gpio13"; |
| 70 | + function = "sdc_clk"; |
| 71 | + drive-strength = <8>; |
| 72 | + bias-disable; |
| 73 | + }; |
| 74 | + |
| 75 | + cmd-pins { |
| 76 | + pins = "gpio12"; |
| 77 | + function = "sdc_cmd"; |
| 78 | + drive-strength = <8>; |
| 79 | + bias-pull-up; |
| 80 | + }; |
| 81 | + |
| 82 | + data-pins { |
| 83 | + pins = "gpio8", "gpio9", "gpio10", "gpio11"; |
| 84 | + function = "sdc_data"; |
| 85 | + drive-strength = <8>; |
| 86 | + bias-pull-up; |
| 87 | + }; |
| 88 | + }; |
| 89 | + |
| 90 | + spi_0_data_clk_pins: spi-0-data-clk-state { |
| 91 | + pins = "gpio14", "gpio15", "gpio16"; |
| 92 | + function = "blsp0_spi"; |
| 93 | + drive-strength = <2>; |
| 94 | + bias-pull-down; |
| 95 | + }; |
| 96 | + |
| 97 | + spi_0_cs_pins: spi-0-cs-state { |
| 98 | + pins = "gpio17"; |
| 99 | + function = "blsp0_spi"; |
| 100 | + drive-strength = <2>; |
| 101 | + bias-pull-up; |
| 102 | + }; |
| 103 | +}; |
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