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Merge tag 'cxl-fixes-6.5-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl
Pull cxl fixes from Vishal Verma: - Update MAINTAINERS for cxl - A few static analysis fixes - Fix a Kconfig dependency for CONFIG_FW_LOADER * tag 'cxl-fixes-6.5-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl: tools/testing/cxl: Remove unused SZ_512G macro cxl/acpi: Return 'rc' instead of '0' in cxl_parse_cfmws() cxl/acpi: Fix a use-after-free in cxl_parse_cfmws() cxl: Update MAINTAINERS cxl/mem: Fix a double shift bug cxl: fix CONFIG_FW_LOADER dependency
2 parents c442a95 + 70d49bb commit f24767c

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lines changed

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MAINTAINERS

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5149,10 +5149,12 @@ S: Maintained
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F: include/linux/compiler_attributes.h
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COMPUTE EXPRESS LINK (CXL)
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M: Davidlohr Bueso <[email protected]>
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M: Jonathan Cameron <[email protected]>
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M: Dave Jiang <[email protected]>
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M: Alison Schofield <[email protected]>
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M: Vishal Verma <[email protected]>
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M: Ira Weiny <[email protected]>
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M: Ben Widawsky <[email protected]>
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M: Dan Williams <[email protected]>
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S: Maintained

drivers/cxl/Kconfig

Lines changed: 2 additions & 1 deletion
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@@ -2,6 +2,8 @@
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menuconfig CXL_BUS
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tristate "CXL (Compute Express Link) Devices Support"
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depends on PCI
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select FW_LOADER
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select FW_UPLOAD
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select PCI_DOE
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help
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CXL is a bus that is electrically compatible with PCI Express, but
@@ -82,7 +84,6 @@ config CXL_PMEM
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config CXL_MEM
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tristate "CXL: Memory Expansion"
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depends on CXL_PCI
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select FW_UPLOAD
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default CXL_BUS
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help
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The CXL.mem protocol allows a device to act as a provider of "System

drivers/cxl/acpi.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -296,9 +296,8 @@ static int cxl_parse_cfmws(union acpi_subtable_headers *header, void *arg,
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else
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rc = cxl_decoder_autoremove(dev, cxld);
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if (rc) {
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dev_err(dev, "Failed to add decode range [%#llx - %#llx]\n",
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cxld->hpa_range.start, cxld->hpa_range.end);
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return 0;
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dev_err(dev, "Failed to add decode range: %pr", res);
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return rc;
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}
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dev_dbg(dev, "add: %s node: %d range [%#llx - %#llx]\n",
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dev_name(&cxld->dev),

drivers/cxl/cxlmem.h

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@@ -323,7 +323,7 @@ struct cxl_mbox_activate_fw {
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/* FW state bits */
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#define CXL_FW_STATE_BITS 32
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#define CXL_FW_CANCEL BIT(0)
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#define CXL_FW_CANCEL 0
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/**
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* struct cxl_fw_state - Firmware upload / activation state

tools/testing/cxl/test/cxl.c

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@@ -999,10 +999,6 @@ static void mock_companion(struct acpi_device *adev, struct device *dev)
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#define SZ_64G (SZ_32G * 2)
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#endif
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#ifndef SZ_512G
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#define SZ_512G (SZ_64G * 8)
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#endif
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static __init int cxl_rch_init(void)
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{
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int rc, i;

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