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dt-bindings: PCI: qcom-ep: Add SAR2130P compatible
Add support for using the PCI controller in the PCIe Endpoint mode on the SAR2130P platform. This is needed, as it is not possible to use a compatible fallback on any other platform since SAR2130P uses slightly different set of clocks. Reviewed-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <[email protected]>
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Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml

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@@ -14,6 +14,7 @@ properties:
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oneOf:
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- enum:
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- qcom,sa8775p-pcie-ep
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- qcom,sar2130p-pcie-ep
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- qcom,sdx55-pcie-ep
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- qcom,sm8450-pcie-ep
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- items:
@@ -44,11 +45,11 @@ properties:
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clocks:
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minItems: 5
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maxItems: 8
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maxItems: 9
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clock-names:
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minItems: 5
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maxItems: 8
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maxItems: 9
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qcom,perst-regs:
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description: Reference to a syscon representing TCSR followed by the two
@@ -132,6 +133,37 @@ required:
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allOf:
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- $ref: pci-ep.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sar2130p-pcie-ep
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then:
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properties:
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clocks:
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items:
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- description: PCIe Auxiliary clock
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- description: PCIe CFG AHB clock
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- description: PCIe Master AXI clock
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- description: PCIe Slave AXI clock
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- description: PCIe Slave Q2A AXI clock
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- description: PCIe DDRSS SF TBU clock
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- description: PCIe AGGRE NOC AXI clock
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- description: PCIe CFG NOC AXI clock
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- description: PCIe QMIP AHB clock
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clock-names:
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items:
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- const: aux
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- const: cfg
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- const: bus_master
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- const: bus_slave
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- const: slave_q2a
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- const: ddrss_sf_tbu
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- const: aggre_noc_axi
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- const: cnoc_sf_axi
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- const: qmip_pcie_ahb
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- if:
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properties:
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compatible:

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