Skip to content

Commit f42ee7c

Browse files
committed
Merge tag 'qcom-arm64-fixes-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/fixes
Qualcomm ARM64 Devicetree fixes for v6.3 This correct SIM card selection on the two newly introduced MSM8916-based USB modems. The firmware-name for the first CDSP is corrected on the SA8540P Ride board. The PCIe controller in SC7280 is marked cache-coherent, which resolves seen data corruption issues. Labels are added to the vadc channel nodes on SC8280XP, as the Linux driver was updated to not include the unit address when generating device names and collisions thereby prevented registration of the channels. Audio clocks and routing is corrected and a few regulators are marked always-on for the Lenovo Thinkpad X13s, as their clients are not fully described at this point. SPI5 was accidentally enabled by default on SM6115, and is disabled again. CDSP on SM6375 is provided its power-domains, to appropriately vote for during power up for the DSP. The iommu mask for the PCIe controllers in SM8150 is updated, to match what the hypervisor expects. Th Venus firmware path is corrected on Xiaomi Mi Pad 5 Pro. The UFS controller is marked cache coherent on SM8350 and SM8450. The clocks for the second WSA macro on SM8450 is corrected, and given its own clocks. The bias-pull-up value for I2C pins are corrected on SM8550, to trigger the selection of the strong pull. CPU compatibles and the base address of the LPASS TLMM block are corrected. * tag 'qcom-arm64-fixes-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (23 commits) arm64: dts: qcom: sc8280xp-x13s: mark bob regulator as always-on arm64: dts: qcom: sc8280xp-x13s: mark s12b regulator as always-on arm64: dts: qcom: sc8280xp-x13s: mark s10b regulator as always-on arm64: dts: qcom: sc8280xp-x13s: mark s11b regulator as always-on arm64: dts: qcom: sm8550: Mark UFS controller as cache coherent arm64: dts: qcom: sa8540p-ride: correct name of remoteproc_nsp0 firmware arm64: dts: qcom: sm8450: Mark UFS controller as cache coherent arm64: dts: qcom: sm8350: Mark UFS controller as cache coherent arm64: dts: qcom: sm8550: fix LPASS pinctrl slew base address arm64: dts: qcom: sc8280xp-x13s: fix va dmic dai links and routing arm64: dts: qcom: sc8280xp-x13s: fix dmic sample rate arm64: dts: qcom: sc8280xp: fix lpass tx macro clocks arm64: dts: qcom: sc8280xp: fix rx frame shapping info arm64: dts: qcom: sm8450: correct WSA2 assigned clocks arm64: dts: qcom: sc7280: Mark PCIe controller as cache coherent arm64: dts: qcom: msm8916-ufi: Fix sim card selection pinctrl arm64: dts: qcom: sm8250-xiaomi-elish: Correct venus firmware path arm64: dts: qcom: sm8550: Use correct CPU compatibles arm64: dts: qcom: sm8550: Add bias pull up value to tlmm i2c data clk states arm64: dts: qcom: sm6375: Add missing power-domain-named to CDSP ... Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2 parents d2e53ce + 07b0883 commit f42ee7c

14 files changed

+94
-60
lines changed

arch/arm64/boot/dts/qcom/msm8916-thwc-uf896.dts

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,3 @@
3333
&gpio_leds_default {
3434
pins = "gpio81", "gpio82", "gpio83";
3535
};
36-
37-
&sim_ctrl_default {
38-
pins = "gpio1", "gpio2";
39-
};

arch/arm64/boot/dts/qcom/msm8916-thwc-ufi001c.dts

Lines changed: 26 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,11 @@
2525
gpios = <&msmgpio 20 GPIO_ACTIVE_HIGH>;
2626
};
2727

28+
&mpss {
29+
pinctrl-0 = <&sim_ctrl_default>;
30+
pinctrl-names = "default";
31+
};
32+
2833
&button_default {
2934
pins = "gpio37";
3035
bias-pull-down;
@@ -34,6 +39,25 @@
3439
pins = "gpio20", "gpio21", "gpio22";
3540
};
3641

37-
&sim_ctrl_default {
38-
pins = "gpio1", "gpio2";
42+
/* This selects the external SIM card slot by default */
43+
&msmgpio {
44+
sim_ctrl_default: sim-ctrl-default-state {
45+
esim-sel-pins {
46+
pins = "gpio0", "gpio3";
47+
bias-disable;
48+
output-low;
49+
};
50+
51+
sim-en-pins {
52+
pins = "gpio1";
53+
bias-disable;
54+
output-low;
55+
};
56+
57+
sim-sel-pins {
58+
pins = "gpio2";
59+
bias-disable;
60+
output-high;
61+
};
62+
};
3963
};

arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -92,9 +92,6 @@
9292
};
9393

9494
&mpss {
95-
pinctrl-0 = <&sim_ctrl_default>;
96-
pinctrl-names = "default";
97-
9895
status = "okay";
9996
};
10097

@@ -240,11 +237,4 @@
240237
drive-strength = <2>;
241238
bias-disable;
242239
};
243-
244-
sim_ctrl_default: sim-ctrl-default-state {
245-
function = "gpio";
246-
drive-strength = <2>;
247-
bias-disable;
248-
output-low;
249-
};
250240
};

arch/arm64/boot/dts/qcom/sa8540p-ride.dts

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -241,7 +241,7 @@
241241
};
242242

243243
&remoteproc_nsp0 {
244-
firmware-name = "qcom/sa8540p/cdsp.mbn";
244+
firmware-name = "qcom/sa8540p/cdsp0.mbn";
245245
status = "okay";
246246
};
247247

arch/arm64/boot/dts/qcom/sc7280.dtsi

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2131,6 +2131,8 @@
21312131
pinctrl-names = "default";
21322132
pinctrl-0 = <&pcie1_clkreq_n>;
21332133

2134+
dma-coherent;
2135+
21342136
iommus = <&apps_smmu 0x1c80 0x1>;
21352137

21362138
iommu-map = <0x0 &apps_smmu 0x1c80 0x1>,

arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts

Lines changed: 22 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -370,20 +370,23 @@
370370
regulator-min-microvolt = <1800000>;
371371
regulator-max-microvolt = <1800000>;
372372
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373+
regulator-always-on;
373374
};
374375

375376
vreg_s11b: smps11 {
376377
regulator-name = "vreg_s11b";
377378
regulator-min-microvolt = <1272000>;
378379
regulator-max-microvolt = <1272000>;
379380
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
381+
regulator-always-on;
380382
};
381383

382384
vreg_s12b: smps12 {
383385
regulator-name = "vreg_s12b";
384386
regulator-min-microvolt = <984000>;
385387
regulator-max-microvolt = <984000>;
386388
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
389+
regulator-always-on;
387390
};
388391

389392
vreg_l3b: ldo3 {
@@ -441,6 +444,7 @@
441444
regulator-min-microvolt = <3008000>;
442445
regulator-max-microvolt = <3960000>;
443446
regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
447+
regulator-always-on;
444448
};
445449
};
446450

@@ -772,75 +776,88 @@
772776
pmic-die-temp@3 {
773777
reg = <PMK8350_ADC7_DIE_TEMP>;
774778
qcom,pre-scaling = <1 1>;
779+
label = "pmk8350_die_temp";
775780
};
776781

777782
xo-therm@44 {
778783
reg = <PMK8350_ADC7_AMUX_THM1_100K_PU>;
779784
qcom,hw-settle-time = <200>;
780785
qcom,ratiometric;
786+
label = "pmk8350_xo_therm";
781787
};
782788

783789
pmic-die-temp@103 {
784790
reg = <PM8350_ADC7_DIE_TEMP(1)>;
785791
qcom,pre-scaling = <1 1>;
792+
label = "pmc8280_1_die_temp";
786793
};
787794

788795
sys-therm@144 {
789796
reg = <PM8350_ADC7_AMUX_THM1_100K_PU(1)>;
790797
qcom,hw-settle-time = <200>;
791798
qcom,ratiometric;
799+
label = "sys_therm1";
792800
};
793801

794802
sys-therm@145 {
795803
reg = <PM8350_ADC7_AMUX_THM2_100K_PU(1)>;
796804
qcom,hw-settle-time = <200>;
797805
qcom,ratiometric;
806+
label = "sys_therm2";
798807
};
799808

800809
sys-therm@146 {
801810
reg = <PM8350_ADC7_AMUX_THM3_100K_PU(1)>;
802811
qcom,hw-settle-time = <200>;
803812
qcom,ratiometric;
813+
label = "sys_therm3";
804814
};
805815

806816
sys-therm@147 {
807817
reg = <PM8350_ADC7_AMUX_THM4_100K_PU(1)>;
808818
qcom,hw-settle-time = <200>;
809819
qcom,ratiometric;
820+
label = "sys_therm4";
810821
};
811822

812823
pmic-die-temp@303 {
813824
reg = <PM8350_ADC7_DIE_TEMP(3)>;
814825
qcom,pre-scaling = <1 1>;
826+
label = "pmc8280_2_die_temp";
815827
};
816828

817829
sys-therm@344 {
818830
reg = <PM8350_ADC7_AMUX_THM1_100K_PU(3)>;
819831
qcom,hw-settle-time = <200>;
820832
qcom,ratiometric;
833+
label = "sys_therm5";
821834
};
822835

823836
sys-therm@345 {
824837
reg = <PM8350_ADC7_AMUX_THM2_100K_PU(3)>;
825838
qcom,hw-settle-time = <200>;
826839
qcom,ratiometric;
840+
label = "sys_therm6";
827841
};
828842

829843
sys-therm@346 {
830844
reg = <PM8350_ADC7_AMUX_THM3_100K_PU(3)>;
831845
qcom,hw-settle-time = <200>;
832846
qcom,ratiometric;
847+
label = "sys_therm7";
833848
};
834849

835850
sys-therm@347 {
836851
reg = <PM8350_ADC7_AMUX_THM4_100K_PU(3)>;
837852
qcom,hw-settle-time = <200>;
838853
qcom,ratiometric;
854+
label = "sys_therm8";
839855
};
840856

841857
pmic-die-temp@403 {
842858
reg = <PMR735A_ADC7_DIE_TEMP>;
843859
qcom,pre-scaling = <1 1>;
860+
label = "pmr735a_die_temp";
844861
};
845862
};
846863

@@ -884,9 +901,9 @@
884901
"VA DMIC0", "MIC BIAS1",
885902
"VA DMIC1", "MIC BIAS1",
886903
"VA DMIC2", "MIC BIAS3",
887-
"TX DMIC0", "MIC BIAS1",
888-
"TX DMIC1", "MIC BIAS2",
889-
"TX DMIC2", "MIC BIAS3",
904+
"VA DMIC0", "VA MIC BIAS1",
905+
"VA DMIC1", "VA MIC BIAS1",
906+
"VA DMIC2", "VA MIC BIAS3",
890907
"TX SWR_ADC1", "ADC2_OUTPUT";
891908

892909
wcd-playback-dai-link {
@@ -937,7 +954,7 @@
937954
va-dai-link {
938955
link-name = "VA Capture";
939956
cpu {
940-
sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
957+
sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;
941958
};
942959

943960
platform {
@@ -1062,7 +1079,7 @@
10621079

10631080
vdd-micb-supply = <&vreg_s10b>;
10641081

1065-
qcom,dmic-sample-rate = <600000>;
1082+
qcom,dmic-sample-rate = <4800000>;
10661083

10671084
status = "okay";
10681085
};

arch/arm64/boot/dts/qcom/sc8280xp.dtsi

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -2504,12 +2504,12 @@
25042504
qcom,ports-sinterval-low = /bits/ 8 <0x03 0x1f 0x1f 0x07 0x00>;
25052505
qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0B 0x01 0x00>;
25062506
qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0B 0x00 0x00>;
2507-
qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>;
2508-
qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>;
2507+
qcom,ports-hstart = /bits/ 8 <0xff 0x03 0x00 0xff 0xff>;
2508+
qcom,ports-hstop = /bits/ 8 <0xff 0x06 0x0f 0xff 0xff>;
25092509
qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>;
2510-
qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>;
2510+
qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0x01 0xff 0xff>;
25112511
qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
2512-
qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00>;
2512+
qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>;
25132513

25142514
#sound-dai-cells = <1>;
25152515
#address-cells = <2>;
@@ -2600,7 +2600,7 @@
26002600
<&intc GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>;
26012601
interrupt-names = "core", "wake";
26022602

2603-
clocks = <&vamacro>;
2603+
clocks = <&txmacro>;
26042604
clock-names = "iface";
26052605
label = "TX";
26062606
#sound-dai-cells = <1>;
@@ -2609,15 +2609,15 @@
26092609

26102610
qcom,din-ports = <4>;
26112611
qcom,dout-ports = <0>;
2612-
qcom,ports-sinterval-low = /bits/ 8 <0x01 0x03 0x03 0x03>;
2613-
qcom,ports-offset1 = /bits/ 8 <0x01 0x00 0x02 0x01>;
2612+
qcom,ports-sinterval-low = /bits/ 8 <0x01 0x01 0x03 0x03>;
2613+
qcom,ports-offset1 = /bits/ 8 <0x01 0x00 0x02 0x00>;
26142614
qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00 0x00>;
26152615
qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0xff 0xff>;
26162616
qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff>;
26172617
qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff>;
2618-
qcom,ports-word-length = /bits/ 8 <0xff 0x00 0xff 0xff>;
2618+
qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff>;
26192619
qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff>;
2620-
qcom,ports-lane-control = /bits/ 8 <0x00 0x01 0x00 0x00>;
2620+
qcom,ports-lane-control = /bits/ 8 <0x00 0x01 0x00 0x01>;
26212621

26222622
status = "disabled";
26232623
};

arch/arm64/boot/dts/qcom/sm6115.dtsi

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1078,6 +1078,7 @@
10781078
dma-names = "tx", "rx";
10791079
#address-cells = <1>;
10801080
#size-cells = <0>;
1081+
status = "disabled";
10811082
};
10821083
};
10831084

arch/arm64/boot/dts/qcom/sm6375.dtsi

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1209,6 +1209,7 @@
12091209
clock-names = "xo";
12101210

12111211
power-domains = <&rpmpd SM6375_VDDCX>;
1212+
power-domain-names = "cx";
12121213

12131214
memory-region = <&pil_cdsp_mem>;
12141215

arch/arm64/boot/dts/qcom/sm8150.dtsi

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1826,7 +1826,7 @@
18261826
"slave_q2a",
18271827
"tbu";
18281828

1829-
iommus = <&apps_smmu 0x1d80 0x7f>;
1829+
iommus = <&apps_smmu 0x1d80 0x3f>;
18301830
iommu-map = <0x0 &apps_smmu 0x1d80 0x1>,
18311831
<0x100 &apps_smmu 0x1d81 0x1>;
18321832

@@ -1925,7 +1925,7 @@
19251925
assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
19261926
assigned-clock-rates = <19200000>;
19271927

1928-
iommus = <&apps_smmu 0x1e00 0x7f>;
1928+
iommus = <&apps_smmu 0x1e00 0x3f>;
19291929
iommu-map = <0x0 &apps_smmu 0x1e00 0x1>,
19301930
<0x100 &apps_smmu 0x1e01 0x1>;
19311931

0 commit comments

Comments
 (0)