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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM updates from Paolo Bonzini: "ARM: - Move a lot of state that was previously stored on a per vcpu basis into a per-CPU area, because it is only pertinent to the host while the vcpu is loaded. This results in better state tracking, and a smaller vcpu structure. - Add full handling of the ERET/ERETAA/ERETAB instructions in nested virtualisation. The last two instructions also require emulating part of the pointer authentication extension. As a result, the trap handling of pointer authentication has been greatly simplified. - Turn the global (and not very scalable) LPI translation cache into a per-ITS, scalable cache, making non directly injected LPIs much cheaper to make visible to the vcpu. - A batch of pKVM patches, mostly fixes and cleanups, as the upstreaming process seems to be resuming. Fingers crossed! - Allocate PPIs and SGIs outside of the vcpu structure, allowing for smaller EL2 mapping and some flexibility in implementing more or less than 32 private IRQs. - Purge stale mpidr_data if a vcpu is created after the MPIDR map has been created. - Preserve vcpu-specific ID registers across a vcpu reset. - Various minor cleanups and improvements. LoongArch: - Add ParaVirt IPI support - Add software breakpoint support - Add mmio trace events support RISC-V: - Support guest breakpoints using ebreak - Introduce per-VCPU mp_state_lock and reset_cntx_lock - Virtualize SBI PMU snapshot and counter overflow interrupts - New selftests for SBI PMU and Guest ebreak - Some preparatory work for both TDX and SNP page fault handling. This also cleans up the page fault path, so that the priorities of various kinds of fauls (private page, no memory, write to read-only slot, etc.) are easier to follow. x86: - Minimize amount of time that shadow PTEs remain in the special REMOVED_SPTE state. This is a state where the mmu_lock is held for reading but concurrent accesses to the PTE have to spin; shortening its use allows other vCPUs to repopulate the zapped region while the zapper finishes tearing down the old, defunct page tables. - Advertise the max mappable GPA in the "guest MAXPHYADDR" CPUID field, which is defined by hardware but left for software use. This lets KVM communicate its inability to map GPAs that set bits 51:48 on hosts without 5-level nested page tables. Guest firmware is expected to use the information when mapping BARs; this avoids that they end up at a legal, but unmappable, GPA. - Fixed a bug where KVM would not reject accesses to MSR that aren't supposed to exist given the vCPU model and/or KVM configuration. - As usual, a bunch of code cleanups. x86 (AMD): - Implement a new and improved API to initialize SEV and SEV-ES VMs, which will also be extendable to SEV-SNP. The new API specifies the desired encryption in KVM_CREATE_VM and then separately initializes the VM. The new API also allows customizing the desired set of VMSA features; the features affect the measurement of the VM's initial state, and therefore enabling them cannot be done tout court by the hypervisor. While at it, the new API includes two bugfixes that couldn't be applied to the old one without a flag day in userspace or without affecting the initial measurement. When a SEV-ES VM is created with the new VM type, KVM_GET_REGS/KVM_SET_REGS and friends are rejected once the VMSA has been encrypted. Also, the FPU and AVX state will be synchronized and encrypted too. - Support for GHCB version 2 as applicable to SEV-ES guests. This, once more, is only accessible when using the new KVM_SEV_INIT2 flow for initialization of SEV-ES VMs. x86 (Intel): - An initial bunch of prerequisite patches for Intel TDX were merged. They generally don't do anything interesting. The only somewhat user visible change is a new debugging mode that checks that KVM's MMU never triggers a #VE virtualization exception in the guest. - Clear vmcs.EXIT_QUALIFICATION when synthesizing an EPT Misconfig VM-Exit to L1, as per the SDM. Generic: - Use vfree() instead of kvfree() for allocations that always use vcalloc() or __vcalloc(). - Remove .change_pte() MMU notifier - the changes to non-KVM code are small and Andrew Morton asked that I also take those through the KVM tree. The callback was only ever implemented by KVM (which was also the original user of MMU notifiers) but it had been nonfunctional ever since calls to set_pte_at_notify were wrapped with invalidate_range_start and invalidate_range_end... in 2012. Selftests: - Enhance the demand paging test to allow for better reporting and stressing of UFFD performance. - Convert the steal time test to generate TAP-friendly output. - Fix a flaky false positive in the xen_shinfo_test due to comparing elapsed time across two different clock domains. - Skip the MONITOR/MWAIT test if the host doesn't actually support MWAIT. - Avoid unnecessary use of "sudo" in the NX hugepage test wrapper shell script, to play nice with running in a minimal userspace environment. - Allow skipping the RSEQ test's sanity check that the vCPU was able to complete a reasonable number of KVM_RUNs, as the assert can fail on a completely valid setup. If the test is run on a large-ish system that is otherwise idle, and the test isn't affined to a low-ish number of CPUs, the vCPU task can be repeatedly migrated to CPUs that are in deep sleep states, which results in the vCPU having very little net runtime before the next migration due to high wakeup latencies. - Define _GNU_SOURCE for all selftests to fix a warning that was introduced by a change to kselftest_harness.h late in the 6.9 cycle, and because forcing every test to #define _GNU_SOURCE is painful. - Provide a global pseudo-RNG instance for all tests, so that library code can generate random, but determinstic numbers. - Use the global pRNG to randomly force emulation of select writes from guest code on x86, e.g. to help validate KVM's emulation of locked accesses. - Allocate and initialize x86's GDT, IDT, TSS, segments, and default exception handlers at VM creation, instead of forcing tests to manually trigger the related setup. Documentation: - Fix a goof in the KVM_CREATE_GUEST_MEMFD documentation" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (225 commits) selftests/kvm: remove dead file KVM: selftests: arm64: Test vCPU-scoped feature ID registers KVM: selftests: arm64: Test that feature ID regs survive a reset KVM: selftests: arm64: Store expected register value in set_id_regs KVM: selftests: arm64: Rename helper in set_id_regs to imply VM scope KVM: arm64: Only reset vCPU-scoped feature ID regs once KVM: arm64: Reset VM feature ID regs from kvm_reset_sys_regs() KVM: arm64: Rename is_id_reg() to imply VM scope KVM: arm64: Destroy mpidr_data for 'late' vCPU creation KVM: arm64: Use hVHE in pKVM by default on CPUs with VHE support KVM: arm64: Fix hvhe/nvhe early alias parsing KVM: SEV: Allow per-guest configuration of GHCB protocol version KVM: SEV: Add GHCB handling for termination requests KVM: SEV: Add GHCB handling for Hypervisor Feature Support requests KVM: SEV: Add support to handle AP reset MSR protocol KVM: x86: Explicitly zero kvm_caps during vendor module load KVM: x86: Fully re-initialize supported_mce_cap on vendor module load KVM: x86: Fully re-initialize supported_vm_types on vendor module load KVM: x86/mmu: Sanity check that __kvm_faultin_pfn() doesn't create noslot pfns KVM: x86/mmu: Initialize kvm_page_fault's pfn and hva to error values ...
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‎Documentation/virt/kvm/api.rst

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@@ -6316,7 +6316,7 @@ The "flags" field is reserved for future extensions and must be '0'.
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:Architectures: none
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:Type: vm ioctl
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:Parameters: struct kvm_create_guest_memfd(in)
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:Returns: 0 on success, <0 on error
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:Returns: A file descriptor on success, <0 on error
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KVM_CREATE_GUEST_MEMFD creates an anonymous file and returns a file descriptor
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that refers to it. guest_memfd files are roughly analogous to files created
@@ -6894,6 +6894,13 @@ Note that KVM does not skip the faulting instruction as it does for
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KVM_EXIT_MMIO, but userspace has to emulate any change to the processing state
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if it decides to decode and emulate the instruction.
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This feature isn't available to protected VMs, as userspace does not
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have access to the state that is required to perform the emulation.
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Instead, a data abort exception is directly injected in the guest.
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Note that although KVM_CAP_ARM_NISV_TO_USER will be reported if
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queried outside of a protected VM context, the feature will not be
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exposed if queried on a protected VM file descriptor.
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::
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/* KVM_EXIT_X86_RDMSR / KVM_EXIT_X86_WRMSR */
@@ -8819,6 +8826,8 @@ means the VM type with value @n is supported. Possible values of @n are::
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#define KVM_X86_DEFAULT_VM 0
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#define KVM_X86_SW_PROTECTED_VM 1
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#define KVM_X86_SEV_VM 2
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#define KVM_X86_SEV_ES_VM 3
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Note, KVM_X86_SW_PROTECTED_VM is currently only for development and testing.
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Do not use KVM_X86_SW_PROTECTED_VM for "real" VMs, and especially not in

‎Documentation/virt/kvm/arm/fw-pseudo-registers.rst

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.. SPDX-License-Identifier: GPL-2.0
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=======================================
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ARM firmware pseudo-registers interface
5+
=======================================
6+
7+
KVM handles the hypercall services as requested by the guests. New hypercall
8+
services are regularly made available by the ARM specification or by KVM (as
9+
vendor services) if they make sense from a virtualization point of view.
10+
11+
This means that a guest booted on two different versions of KVM can observe
12+
two different "firmware" revisions. This could cause issues if a given guest
13+
is tied to a particular version of a hypercall service, or if a migration
14+
causes a different version to be exposed out of the blue to an unsuspecting
15+
guest.
16+
17+
In order to remedy this situation, KVM exposes a set of "firmware
18+
pseudo-registers" that can be manipulated using the GET/SET_ONE_REG
19+
interface. These registers can be saved/restored by userspace, and set
20+
to a convenient value as required.
21+
22+
The following registers are defined:
23+
24+
* KVM_REG_ARM_PSCI_VERSION:
25+
26+
KVM implements the PSCI (Power State Coordination Interface)
27+
specification in order to provide services such as CPU on/off, reset
28+
and power-off to the guest.
29+
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- Only valid if the vcpu has the KVM_ARM_VCPU_PSCI_0_2 feature set
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(and thus has already been initialized)
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- Returns the current PSCI version on GET_ONE_REG (defaulting to the
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highest PSCI version implemented by KVM and compatible with v0.2)
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- Allows any PSCI version implemented by KVM and compatible with
35+
v0.2 to be set with SET_ONE_REG
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- Affects the whole VM (even if the register view is per-vcpu)
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* KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
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Holds the state of the firmware support to mitigate CVE-2017-5715, as
40+
offered by KVM to the guest via a HVC call. The workaround is described
41+
under SMCCC_ARCH_WORKAROUND_1 in [1].
42+
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Accepted values are:
44+
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KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL:
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KVM does not offer
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firmware support for the workaround. The mitigation status for the
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guest is unknown.
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KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL:
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The workaround HVC call is
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available to the guest and required for the mitigation.
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KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED:
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The workaround HVC call
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is available to the guest, but it is not needed on this VCPU.
55+
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* KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
57+
Holds the state of the firmware support to mitigate CVE-2018-3639, as
58+
offered by KVM to the guest via a HVC call. The workaround is described
59+
under SMCCC_ARCH_WORKAROUND_2 in [1]_.
60+
61+
Accepted values are:
62+
63+
KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL:
64+
A workaround is not
65+
available. KVM does not offer firmware support for the workaround.
66+
KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN:
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The workaround state is
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unknown. KVM does not offer firmware support for the workaround.
69+
KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL:
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The workaround is available,
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and can be disabled by a vCPU. If
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KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED is set, it is active for
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this vCPU.
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KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED:
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The workaround is always active on this vCPU or it is not needed.
76+
77+
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Bitmap Feature Firmware Registers
79+
---------------------------------
80+
81+
Contrary to the above registers, the following registers exposes the
82+
hypercall services in the form of a feature-bitmap to the userspace. This
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bitmap is translated to the services that are available to the guest.
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There is a register defined per service call owner and can be accessed via
85+
GET/SET_ONE_REG interface.
86+
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By default, these registers are set with the upper limit of the features
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that are supported. This way userspace can discover all the usable
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hypercall services via GET_ONE_REG. The user-space can write-back the
90+
desired bitmap back via SET_ONE_REG. The features for the registers that
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are untouched, probably because userspace isn't aware of them, will be
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exposed as is to the guest.
93+
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Note that KVM will not allow the userspace to configure the registers
95+
anymore once any of the vCPUs has run at least once. Instead, it will
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return a -EBUSY.
97+
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The pseudo-firmware bitmap register are as follows:
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* KVM_REG_ARM_STD_BMAP:
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Controls the bitmap of the ARM Standard Secure Service Calls.
102+
103+
The following bits are accepted:
104+
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Bit-0: KVM_REG_ARM_STD_BIT_TRNG_V1_0:
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The bit represents the services offered under v1.0 of ARM True Random
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Number Generator (TRNG) specification, ARM DEN0098.
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* KVM_REG_ARM_STD_HYP_BMAP:
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Controls the bitmap of the ARM Standard Hypervisor Service Calls.
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The following bits are accepted:
113+
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Bit-0: KVM_REG_ARM_STD_HYP_BIT_PV_TIME:
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The bit represents the Paravirtualized Time service as represented by
116+
ARM DEN0057A.
117+
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* KVM_REG_ARM_VENDOR_HYP_BMAP:
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Controls the bitmap of the Vendor specific Hypervisor Service Calls.
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121+
The following bits are accepted:
122+
123+
Bit-0: KVM_REG_ARM_VENDOR_HYP_BIT_FUNC_FEAT
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The bit represents the ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID
125+
and ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID function-ids.
126+
127+
Bit-1: KVM_REG_ARM_VENDOR_HYP_BIT_PTP:
128+
The bit represents the Precision Time Protocol KVM service.
129+
130+
Errors:
131+
132+
======= =============================================================
133+
-ENOENT Unknown register accessed.
134+
-EBUSY Attempt a 'write' to the register after the VM has started.
135+
-EINVAL Invalid bitmap written to the register.
136+
======= =============================================================
137+
138+
.. [1] https://developer.arm.com/-/media/developer/pdf/ARM_DEN_0070A_Firmware_interfaces_for_mitigating_CVE-2017-5715.pdf

‎Documentation/virt/kvm/arm/hypercalls.rst

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@@ -1,138 +1,46 @@
11
.. SPDX-License-Identifier: GPL-2.0
22
3-
=======================
4-
ARM Hypercall Interface
5-
=======================
6-
7-
KVM handles the hypercall services as requested by the guests. New hypercall
8-
services are regularly made available by the ARM specification or by KVM (as
9-
vendor services) if they make sense from a virtualization point of view.
10-
11-
This means that a guest booted on two different versions of KVM can observe
12-
two different "firmware" revisions. This could cause issues if a given guest
13-
is tied to a particular version of a hypercall service, or if a migration
14-
causes a different version to be exposed out of the blue to an unsuspecting
15-
guest.
16-
17-
In order to remedy this situation, KVM exposes a set of "firmware
18-
pseudo-registers" that can be manipulated using the GET/SET_ONE_REG
19-
interface. These registers can be saved/restored by userspace, and set
20-
to a convenient value as required.
21-
22-
The following registers are defined:
23-
24-
* KVM_REG_ARM_PSCI_VERSION:
25-
26-
KVM implements the PSCI (Power State Coordination Interface)
27-
specification in order to provide services such as CPU on/off, reset
28-
and power-off to the guest.
29-
30-
- Only valid if the vcpu has the KVM_ARM_VCPU_PSCI_0_2 feature set
31-
(and thus has already been initialized)
32-
- Returns the current PSCI version on GET_ONE_REG (defaulting to the
33-
highest PSCI version implemented by KVM and compatible with v0.2)
34-
- Allows any PSCI version implemented by KVM and compatible with
35-
v0.2 to be set with SET_ONE_REG
36-
- Affects the whole VM (even if the register view is per-vcpu)
37-
38-
* KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
39-
Holds the state of the firmware support to mitigate CVE-2017-5715, as
40-
offered by KVM to the guest via a HVC call. The workaround is described
41-
under SMCCC_ARCH_WORKAROUND_1 in [1].
42-
43-
Accepted values are:
44-
45-
KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL:
46-
KVM does not offer
47-
firmware support for the workaround. The mitigation status for the
48-
guest is unknown.
49-
KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL:
50-
The workaround HVC call is
51-
available to the guest and required for the mitigation.
52-
KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED:
53-
The workaround HVC call
54-
is available to the guest, but it is not needed on this VCPU.
55-
56-
* KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
57-
Holds the state of the firmware support to mitigate CVE-2018-3639, as
58-
offered by KVM to the guest via a HVC call. The workaround is described
59-
under SMCCC_ARCH_WORKAROUND_2 in [1]_.
60-
61-
Accepted values are:
62-
63-
KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL:
64-
A workaround is not
65-
available. KVM does not offer firmware support for the workaround.
66-
KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN:
67-
The workaround state is
68-
unknown. KVM does not offer firmware support for the workaround.
69-
KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL:
70-
The workaround is available,
71-
and can be disabled by a vCPU. If
72-
KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED is set, it is active for
73-
this vCPU.
74-
KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED:
75-
The workaround is always active on this vCPU or it is not needed.
76-
77-
78-
Bitmap Feature Firmware Registers
79-
---------------------------------
80-
81-
Contrary to the above registers, the following registers exposes the
82-
hypercall services in the form of a feature-bitmap to the userspace. This
83-
bitmap is translated to the services that are available to the guest.
84-
There is a register defined per service call owner and can be accessed via
85-
GET/SET_ONE_REG interface.
86-
87-
By default, these registers are set with the upper limit of the features
88-
that are supported. This way userspace can discover all the usable
89-
hypercall services via GET_ONE_REG. The user-space can write-back the
90-
desired bitmap back via SET_ONE_REG. The features for the registers that
91-
are untouched, probably because userspace isn't aware of them, will be
92-
exposed as is to the guest.
93-
94-
Note that KVM will not allow the userspace to configure the registers
95-
anymore once any of the vCPUs has run at least once. Instead, it will
96-
return a -EBUSY.
97-
98-
The pseudo-firmware bitmap register are as follows:
99-
100-
* KVM_REG_ARM_STD_BMAP:
101-
Controls the bitmap of the ARM Standard Secure Service Calls.
102-
103-
The following bits are accepted:
104-
105-
Bit-0: KVM_REG_ARM_STD_BIT_TRNG_V1_0:
106-
The bit represents the services offered under v1.0 of ARM True Random
107-
Number Generator (TRNG) specification, ARM DEN0098.
108-
109-
* KVM_REG_ARM_STD_HYP_BMAP:
110-
Controls the bitmap of the ARM Standard Hypervisor Service Calls.
111-
112-
The following bits are accepted:
113-
114-
Bit-0: KVM_REG_ARM_STD_HYP_BIT_PV_TIME:
115-
The bit represents the Paravirtualized Time service as represented by
116-
ARM DEN0057A.
117-
118-
* KVM_REG_ARM_VENDOR_HYP_BMAP:
119-
Controls the bitmap of the Vendor specific Hypervisor Service Calls.
120-
121-
The following bits are accepted:
122-
123-
Bit-0: KVM_REG_ARM_VENDOR_HYP_BIT_FUNC_FEAT
124-
The bit represents the ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID
125-
and ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID function-ids.
126-
127-
Bit-1: KVM_REG_ARM_VENDOR_HYP_BIT_PTP:
128-
The bit represents the Precision Time Protocol KVM service.
129-
130-
Errors:
131-
132-
======= =============================================================
133-
-ENOENT Unknown register accessed.
134-
-EBUSY Attempt a 'write' to the register after the VM has started.
135-
-EINVAL Invalid bitmap written to the register.
136-
======= =============================================================
137-
138-
.. [1] https://developer.arm.com/-/media/developer/pdf/ARM_DEN_0070A_Firmware_interfaces_for_mitigating_CVE-2017-5715.pdf
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===============================================
4+
KVM/arm64-specific hypercalls exposed to guests
5+
===============================================
6+
7+
This file documents the KVM/arm64-specific hypercalls which may be
8+
exposed by KVM/arm64 to guest operating systems. These hypercalls are
9+
issued using the HVC instruction according to version 1.1 of the Arm SMC
10+
Calling Convention (DEN0028/C):
11+
12+
https://developer.arm.com/docs/den0028/c
13+
14+
All KVM/arm64-specific hypercalls are allocated within the "Vendor
15+
Specific Hypervisor Service Call" range with a UID of
16+
``28b46fb6-2ec5-11e9-a9ca-4b564d003a74``. This UID should be queried by the
17+
guest using the standard "Call UID" function for the service range in
18+
order to determine that the KVM/arm64-specific hypercalls are available.
19+
20+
``ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID``
21+
---------------------------------------------
22+
23+
Provides a discovery mechanism for other KVM/arm64 hypercalls.
24+
25+
+---------------------+-------------------------------------------------------------+
26+
| Presence: | Mandatory for the KVM/arm64 UID |
27+
+---------------------+-------------------------------------------------------------+
28+
| Calling convention: | HVC32 |
29+
+---------------------+----------+--------------------------------------------------+
30+
| Function ID: | (uint32) | 0x86000000 |
31+
+---------------------+----------+--------------------------------------------------+
32+
| Arguments: | None |
33+
+---------------------+----------+----+---------------------------------------------+
34+
| Return Values: | (uint32) | R0 | Bitmap of available function numbers 0-31 |
35+
| +----------+----+---------------------------------------------+
36+
| | (uint32) | R1 | Bitmap of available function numbers 32-63 |
37+
| +----------+----+---------------------------------------------+
38+
| | (uint32) | R2 | Bitmap of available function numbers 64-95 |
39+
| +----------+----+---------------------------------------------+
40+
| | (uint32) | R3 | Bitmap of available function numbers 96-127 |
41+
+---------------------+----------+----+---------------------------------------------+
42+
43+
``ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID``
44+
----------------------------------------
45+
46+
See ptp_kvm.rst

‎Documentation/virt/kvm/arm/index.rst

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@@ -7,6 +7,7 @@ ARM
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.. toctree::
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:maxdepth: 2
99

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fw-pseudo-registers
1011
hyp-abi
1112
hypercalls
1213
pvtime

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