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tamalsahaintelwsakernel
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i2c: designware: Do not complete i2c read without RX_FULL interrupt
Intel Keem Bay platform supports multi-master operations over same i2c bus using Synopsys i2c DesignWare IP. When multi-masters initiate i2c operation simultaneously in a loop, SCL line is stucked low forever after few i2c operations. Following interrupt sequences are observed in: working case: TX_EMPTY, RX_FULL and STOP_DET non working case: TX_EMPTY, STOP_DET, RX_FULL. DW_apb_i2c stretches the SCL line when the TX FIFO is empty or when RX FIFO is full. The DW_apb_i2c master will continue to hold the SCL line LOW until RX FIFO is read. Linux kernel i2c DesignWare driver does not handle above non working sequence. TX_EMPTY, RX_FULL and STOP_DET routine execution are required in sequence although RX_FULL interrupt is raised after STOP_DET by hardware. Clear STOP_DET for the following conditions: (STOP_DET ,RX_FULL, rx_outstanding) Write Operation: (1, 0, 0) Read Operation: RX_FULL followed by STOP_DET: (0, 1, 1) -> (1, 0, 0) STOP_DET followed by RX_FULL: (1, 0, 1) -> (1, 1, 0) RX_FULL and STOP_DET together: (1, 1, 1) Signed-off-by: Tamal Saha <[email protected]> Signed-off-by: Jarkko Nikula <[email protected]> Signed-off-by: Wolfram Sang <[email protected]>
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drivers/i2c/busses/i2c-designware-master.c

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -701,7 +701,8 @@ static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev)
701701
regmap_read(dev->map, DW_IC_CLR_RX_DONE, &dummy);
702702
if (stat & DW_IC_INTR_ACTIVITY)
703703
regmap_read(dev->map, DW_IC_CLR_ACTIVITY, &dummy);
704-
if (stat & DW_IC_INTR_STOP_DET)
704+
if ((stat & DW_IC_INTR_STOP_DET) &&
705+
((dev->rx_outstanding == 0) || (stat & DW_IC_INTR_RX_FULL)))
705706
regmap_read(dev->map, DW_IC_CLR_STOP_DET, &dummy);
706707
if (stat & DW_IC_INTR_START_DET)
707708
regmap_read(dev->map, DW_IC_CLR_START_DET, &dummy);
@@ -723,6 +724,7 @@ static int i2c_dw_irq_handler_master(struct dw_i2c_dev *dev)
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if (stat & DW_IC_INTR_TX_ABRT) {
724725
dev->cmd_err |= DW_IC_ERR_TX_ABRT;
725726
dev->status = STATUS_IDLE;
727+
dev->rx_outstanding = 0;
726728

727729
/*
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* Anytime TX_ABRT is set, the contents of the tx/rx
@@ -745,7 +747,8 @@ static int i2c_dw_irq_handler_master(struct dw_i2c_dev *dev)
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*/
746748

747749
tx_aborted:
748-
if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err)
750+
if (((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err) &&
751+
(dev->rx_outstanding == 0))
749752
complete(&dev->cmd_complete);
750753
else if (unlikely(dev->flags & ACCESS_INTR_MASK)) {
751754
/* Workaround to trigger pending interrupt */

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