dt-bindings: Update Sibi Sankar's email address

Update email address to the quicinc.com domain.

Signed-off-by: Sibi Sankar <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]

Author: Sibi Sankar

Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml

@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: Qualcomm Operating State Manager (OSM) L3 Interconnect Provider
 
 maintainers:
-  - Sibi Sankar <[email protected]>
+  - Sibi Sankar <[email protected]>
 
 description:
   L3 cache bandwidth requirements on Qualcomm SoCs is serviced by the OSM.

Documentation/devicetree/bindings/reset/qcom,aoss-reset.yaml

@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: Qualcomm AOSS Reset Controller
 
 maintainers:
-  - Sibi Sankar <[email protected]>
+  - Sibi Sankar <[email protected]>
 
 description:
   The bindings describe the reset-controller found on AOSS-CC (always on

Documentation/devicetree/bindings/reset/qcom,pdc-global.yaml

@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: Qualcomm PDC Global
 
 maintainers:
-  - Sibi Sankar <[email protected]>
+  - Sibi Sankar <[email protected]>
 
 description:
   The bindings describes the reset-controller found on PDC-Global (Power Domain