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drm/i915/tgl+: Enable display DC power states on all eDP ports
Starting with TGL eDP is supported on ports B+ (besides port A), so make sure DC states are not blocked on any such ports. For this add an AUX_IO_<port> power domain for each port with eDP support. These domains similarly to AUX_IO_A enable only the AUX_IO_<port> power well for an enabled port, whereas the existing AUX_<port> domains enable both the AUX_IO_<port> and the DC_OFF power wells as required by DP AUX transfers. v2: (Ville) - Split the change using AUX vs. AUX_IO on port A to a separate patch. - Select AUX_IO vs. AUX based on crtc_state->has_psr instead of is_edp(). v3: - Rebased on checking intel_encoder_can_psr() instead of crtc->has_psr. v4: - Fix warn in intel_display_power_aux_io_domain(). (Ville) Cc: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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-7
lines changed

4 files changed

+89
-7
lines changed

‎drivers/gpu/drm/i915/display/intel_ddi.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -850,6 +850,8 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
850850
static enum intel_display_power_domain
851851
intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port)
852852
{
853+
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
854+
853855
/* ICL+ HW requires corresponding AUX IOs to be powered up for PSR with
854856
* DC states enabled at the same time, while for driver initiated AUX
855857
* transfers we need the same AUX IOs to be powered but with DC states
@@ -862,8 +864,8 @@ intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port)
862864
* Note that PSR is enabled only on Port A even though this function
863865
* returns the correct domain for other ports too.
864866
*/
865-
if (dig_port->aux_ch == AUX_CH_A && intel_encoder_can_psr(&dig_port->base))
866-
return POWER_DOMAIN_AUX_IO_A;
867+
if (intel_encoder_can_psr(&dig_port->base))
868+
return intel_display_power_aux_io_domain(i915, dig_port->aux_ch);
867869
else
868870
return intel_aux_power_domain(dig_port);
869871
}

‎drivers/gpu/drm/i915/display/intel_display_power.c

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -131,6 +131,16 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
131131
return "AUDIO_PLAYBACK";
132132
case POWER_DOMAIN_AUX_IO_A:
133133
return "AUX_IO_A";
134+
case POWER_DOMAIN_AUX_IO_B:
135+
return "AUX_IO_B";
136+
case POWER_DOMAIN_AUX_IO_C:
137+
return "AUX_IO_C";
138+
case POWER_DOMAIN_AUX_IO_D:
139+
return "AUX_IO_D";
140+
case POWER_DOMAIN_AUX_IO_E:
141+
return "AUX_IO_E";
142+
case POWER_DOMAIN_AUX_IO_F:
143+
return "AUX_IO_F";
134144
case POWER_DOMAIN_AUX_A:
135145
return "AUX_A";
136146
case POWER_DOMAIN_AUX_B:
@@ -2289,6 +2299,7 @@ struct intel_ddi_port_domains {
22892299

22902300
enum intel_display_power_domain ddi_lanes;
22912301
enum intel_display_power_domain ddi_io;
2302+
enum intel_display_power_domain aux_io;
22922303
enum intel_display_power_domain aux_legacy_usbc;
22932304
enum intel_display_power_domain aux_tbt;
22942305
};
@@ -2303,6 +2314,7 @@ i9xx_port_domains[] = {
23032314

23042315
.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_A,
23052316
.ddi_io = POWER_DOMAIN_PORT_DDI_IO_A,
2317+
.aux_io = POWER_DOMAIN_AUX_IO_A,
23062318
.aux_legacy_usbc = POWER_DOMAIN_AUX_A,
23072319
.aux_tbt = POWER_DOMAIN_INVALID,
23082320
},
@@ -2318,6 +2330,7 @@ d11_port_domains[] = {
23182330

23192331
.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_A,
23202332
.ddi_io = POWER_DOMAIN_PORT_DDI_IO_A,
2333+
.aux_io = POWER_DOMAIN_AUX_IO_A,
23212334
.aux_legacy_usbc = POWER_DOMAIN_AUX_A,
23222335
.aux_tbt = POWER_DOMAIN_INVALID,
23232336
}, {
@@ -2328,6 +2341,7 @@ d11_port_domains[] = {
23282341

23292342
.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_C,
23302343
.ddi_io = POWER_DOMAIN_PORT_DDI_IO_C,
2344+
.aux_io = POWER_DOMAIN_AUX_IO_C,
23312345
.aux_legacy_usbc = POWER_DOMAIN_AUX_C,
23322346
.aux_tbt = POWER_DOMAIN_AUX_TBT1,
23332347
},
@@ -2343,6 +2357,7 @@ d12_port_domains[] = {
23432357

23442358
.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_A,
23452359
.ddi_io = POWER_DOMAIN_PORT_DDI_IO_A,
2360+
.aux_io = POWER_DOMAIN_AUX_IO_A,
23462361
.aux_legacy_usbc = POWER_DOMAIN_AUX_A,
23472362
.aux_tbt = POWER_DOMAIN_INVALID,
23482363
}, {
@@ -2353,6 +2368,7 @@ d12_port_domains[] = {
23532368

23542369
.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_TC1,
23552370
.ddi_io = POWER_DOMAIN_PORT_DDI_IO_TC1,
2371+
.aux_io = POWER_DOMAIN_INVALID,
23562372
.aux_legacy_usbc = POWER_DOMAIN_AUX_USBC1,
23572373
.aux_tbt = POWER_DOMAIN_AUX_TBT1,
23582374
},
@@ -2368,6 +2384,7 @@ d13_port_domains[] = {
23682384

23692385
.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_A,
23702386
.ddi_io = POWER_DOMAIN_PORT_DDI_IO_A,
2387+
.aux_io = POWER_DOMAIN_AUX_IO_A,
23712388
.aux_legacy_usbc = POWER_DOMAIN_AUX_A,
23722389
.aux_tbt = POWER_DOMAIN_INVALID,
23732390
}, {
@@ -2378,6 +2395,7 @@ d13_port_domains[] = {
23782395

23792396
.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_TC1,
23802397
.ddi_io = POWER_DOMAIN_PORT_DDI_IO_TC1,
2398+
.aux_io = POWER_DOMAIN_INVALID,
23812399
.aux_legacy_usbc = POWER_DOMAIN_AUX_USBC1,
23822400
.aux_tbt = POWER_DOMAIN_AUX_TBT1,
23832401
}, {
@@ -2388,6 +2406,7 @@ d13_port_domains[] = {
23882406

23892407
.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_D,
23902408
.ddi_io = POWER_DOMAIN_PORT_DDI_IO_D,
2409+
.aux_io = POWER_DOMAIN_AUX_IO_D,
23912410
.aux_legacy_usbc = POWER_DOMAIN_AUX_D,
23922411
.aux_tbt = POWER_DOMAIN_INVALID,
23932412
},
@@ -2465,6 +2484,17 @@ intel_port_domains_for_aux_ch(struct drm_i915_private *i915, enum aux_ch aux_ch)
24652484
return NULL;
24662485
}
24672486

2487+
enum intel_display_power_domain
2488+
intel_display_power_aux_io_domain(struct drm_i915_private *i915, enum aux_ch aux_ch)
2489+
{
2490+
const struct intel_ddi_port_domains *domains = intel_port_domains_for_aux_ch(i915, aux_ch);
2491+
2492+
if (drm_WARN_ON(&i915->drm, !domains || domains->aux_io == POWER_DOMAIN_INVALID))
2493+
return POWER_DOMAIN_AUX_IO_A;
2494+
2495+
return domains->aux_io + (int)(aux_ch - domains->aux_ch_start);
2496+
}
2497+
24682498
enum intel_display_power_domain
24692499
intel_display_power_legacy_aux_domain(struct drm_i915_private *i915, enum aux_ch aux_ch)
24702500
{

‎drivers/gpu/drm/i915/display/intel_display_power.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -79,6 +79,11 @@ enum intel_display_power_domain {
7979
POWER_DOMAIN_AUDIO_PLAYBACK,
8080

8181
POWER_DOMAIN_AUX_IO_A,
82+
POWER_DOMAIN_AUX_IO_B,
83+
POWER_DOMAIN_AUX_IO_C,
84+
POWER_DOMAIN_AUX_IO_D,
85+
POWER_DOMAIN_AUX_IO_E,
86+
POWER_DOMAIN_AUX_IO_F,
8287

8388
POWER_DOMAIN_AUX_A,
8489
POWER_DOMAIN_AUX_B,
@@ -251,6 +256,8 @@ intel_display_power_ddi_lanes_domain(struct drm_i915_private *i915, enum port po
251256
enum intel_display_power_domain
252257
intel_display_power_ddi_io_domain(struct drm_i915_private *i915, enum port port);
253258
enum intel_display_power_domain
259+
intel_display_power_aux_io_domain(struct drm_i915_private *i915, enum aux_ch aux_ch);
260+
enum intel_display_power_domain
254261
intel_display_power_legacy_aux_domain(struct drm_i915_private *i915, enum aux_ch aux_ch);
255262
enum intel_display_power_domain
256263
intel_display_power_tbt_aux_domain(struct drm_i915_private *i915, enum aux_ch aux_ch);

‎drivers/gpu/drm/i915/display/intel_display_power_map.c

Lines changed: 48 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -170,6 +170,8 @@ I915_DECL_PW_DOMAINS(vlv_pwdoms_display,
170170
POWER_DOMAIN_VGA,
171171
POWER_DOMAIN_AUDIO_MMIO,
172172
POWER_DOMAIN_AUDIO_PLAYBACK,
173+
POWER_DOMAIN_AUX_IO_B,
174+
POWER_DOMAIN_AUX_IO_C,
173175
POWER_DOMAIN_AUX_B,
174176
POWER_DOMAIN_AUX_C,
175177
POWER_DOMAIN_GMBUS,
@@ -179,13 +181,17 @@ I915_DECL_PW_DOMAINS(vlv_pwdoms_dpio_cmn_bc,
179181
POWER_DOMAIN_PORT_DDI_LANES_B,
180182
POWER_DOMAIN_PORT_DDI_LANES_C,
181183
POWER_DOMAIN_PORT_CRT,
184+
POWER_DOMAIN_AUX_IO_B,
185+
POWER_DOMAIN_AUX_IO_C,
182186
POWER_DOMAIN_AUX_B,
183187
POWER_DOMAIN_AUX_C,
184188
POWER_DOMAIN_INIT);
185189

186190
I915_DECL_PW_DOMAINS(vlv_pwdoms_dpio_tx_bc_lanes,
187191
POWER_DOMAIN_PORT_DDI_LANES_B,
188192
POWER_DOMAIN_PORT_DDI_LANES_C,
193+
POWER_DOMAIN_AUX_IO_B,
194+
POWER_DOMAIN_AUX_IO_C,
189195
POWER_DOMAIN_AUX_B,
190196
POWER_DOMAIN_AUX_C,
191197
POWER_DOMAIN_INIT);
@@ -243,6 +249,9 @@ I915_DECL_PW_DOMAINS(chv_pwdoms_display,
243249
POWER_DOMAIN_VGA,
244250
POWER_DOMAIN_AUDIO_MMIO,
245251
POWER_DOMAIN_AUDIO_PLAYBACK,
252+
POWER_DOMAIN_AUX_IO_B,
253+
POWER_DOMAIN_AUX_IO_C,
254+
POWER_DOMAIN_AUX_IO_D,
246255
POWER_DOMAIN_AUX_B,
247256
POWER_DOMAIN_AUX_C,
248257
POWER_DOMAIN_AUX_D,
@@ -252,12 +261,15 @@ I915_DECL_PW_DOMAINS(chv_pwdoms_display,
252261
I915_DECL_PW_DOMAINS(chv_pwdoms_dpio_cmn_bc,
253262
POWER_DOMAIN_PORT_DDI_LANES_B,
254263
POWER_DOMAIN_PORT_DDI_LANES_C,
264+
POWER_DOMAIN_AUX_IO_B,
265+
POWER_DOMAIN_AUX_IO_C,
255266
POWER_DOMAIN_AUX_B,
256267
POWER_DOMAIN_AUX_C,
257268
POWER_DOMAIN_INIT);
258269

259270
I915_DECL_PW_DOMAINS(chv_pwdoms_dpio_cmn_d,
260271
POWER_DOMAIN_PORT_DDI_LANES_D,
272+
POWER_DOMAIN_AUX_IO_D,
261273
POWER_DOMAIN_AUX_D,
262274
POWER_DOMAIN_INIT);
263275

@@ -305,6 +317,9 @@ static const struct i915_power_well_desc_list chv_power_wells[] = {
305317
POWER_DOMAIN_VGA, \
306318
POWER_DOMAIN_AUDIO_MMIO, \
307319
POWER_DOMAIN_AUDIO_PLAYBACK, \
320+
POWER_DOMAIN_AUX_IO_B, \
321+
POWER_DOMAIN_AUX_IO_C, \
322+
POWER_DOMAIN_AUX_IO_D, \
308323
POWER_DOMAIN_AUX_B, \
309324
POWER_DOMAIN_AUX_C, \
310325
POWER_DOMAIN_AUX_D
@@ -407,6 +422,8 @@ static const struct i915_power_well_desc_list skl_power_wells[] = {
407422
POWER_DOMAIN_VGA, \
408423
POWER_DOMAIN_AUDIO_MMIO, \
409424
POWER_DOMAIN_AUDIO_PLAYBACK, \
425+
POWER_DOMAIN_AUX_IO_B, \
426+
POWER_DOMAIN_AUX_IO_C, \
410427
POWER_DOMAIN_AUX_B, \
411428
POWER_DOMAIN_AUX_C
412429

@@ -430,6 +447,8 @@ I915_DECL_PW_DOMAINS(bxt_pwdoms_dpio_cmn_a,
430447
I915_DECL_PW_DOMAINS(bxt_pwdoms_dpio_cmn_bc,
431448
POWER_DOMAIN_PORT_DDI_LANES_B,
432449
POWER_DOMAIN_PORT_DDI_LANES_C,
450+
POWER_DOMAIN_AUX_IO_B,
451+
POWER_DOMAIN_AUX_IO_C,
433452
POWER_DOMAIN_AUX_B,
434453
POWER_DOMAIN_AUX_C,
435454
POWER_DOMAIN_INIT);
@@ -483,6 +502,8 @@ static const struct i915_power_well_desc_list bxt_power_wells[] = {
483502
POWER_DOMAIN_VGA, \
484503
POWER_DOMAIN_AUDIO_MMIO, \
485504
POWER_DOMAIN_AUDIO_PLAYBACK, \
505+
POWER_DOMAIN_AUX_IO_B, \
506+
POWER_DOMAIN_AUX_IO_C, \
486507
POWER_DOMAIN_AUX_B, \
487508
POWER_DOMAIN_AUX_C
488509

@@ -509,11 +530,13 @@ I915_DECL_PW_DOMAINS(glk_pwdoms_dpio_cmn_a,
509530

510531
I915_DECL_PW_DOMAINS(glk_pwdoms_dpio_cmn_b,
511532
POWER_DOMAIN_PORT_DDI_LANES_B,
533+
POWER_DOMAIN_AUX_IO_B,
512534
POWER_DOMAIN_AUX_B,
513535
POWER_DOMAIN_INIT);
514536

515537
I915_DECL_PW_DOMAINS(glk_pwdoms_dpio_cmn_c,
516538
POWER_DOMAIN_PORT_DDI_LANES_C,
539+
POWER_DOMAIN_AUX_IO_C,
517540
POWER_DOMAIN_AUX_C,
518541
POWER_DOMAIN_INIT);
519542

@@ -523,10 +546,12 @@ I915_DECL_PW_DOMAINS(glk_pwdoms_aux_a,
523546
POWER_DOMAIN_INIT);
524547

525548
I915_DECL_PW_DOMAINS(glk_pwdoms_aux_b,
549+
POWER_DOMAIN_AUX_IO_B,
526550
POWER_DOMAIN_AUX_B,
527551
POWER_DOMAIN_INIT);
528552

529553
I915_DECL_PW_DOMAINS(glk_pwdoms_aux_c,
554+
POWER_DOMAIN_AUX_IO_C,
530555
POWER_DOMAIN_AUX_C,
531556
POWER_DOMAIN_INIT);
532557

@@ -617,6 +642,11 @@ I915_DECL_PW_DOMAINS(icl_pwdoms_pw_4,
617642
POWER_DOMAIN_VGA, \
618643
POWER_DOMAIN_AUDIO_MMIO, \
619644
POWER_DOMAIN_AUDIO_PLAYBACK, \
645+
POWER_DOMAIN_AUX_IO_B, \
646+
POWER_DOMAIN_AUX_IO_C, \
647+
POWER_DOMAIN_AUX_IO_D, \
648+
POWER_DOMAIN_AUX_IO_E, \
649+
POWER_DOMAIN_AUX_IO_F, \
620650
POWER_DOMAIN_AUX_B, \
621651
POWER_DOMAIN_AUX_C, \
622652
POWER_DOMAIN_AUX_D, \
@@ -660,11 +690,21 @@ I915_DECL_PW_DOMAINS(icl_pwdoms_ddi_io_f, POWER_DOMAIN_PORT_DDI_IO_F);
660690
I915_DECL_PW_DOMAINS(icl_pwdoms_aux_a,
661691
POWER_DOMAIN_AUX_IO_A,
662692
POWER_DOMAIN_AUX_A);
663-
I915_DECL_PW_DOMAINS(icl_pwdoms_aux_b, POWER_DOMAIN_AUX_B);
664-
I915_DECL_PW_DOMAINS(icl_pwdoms_aux_c, POWER_DOMAIN_AUX_C);
665-
I915_DECL_PW_DOMAINS(icl_pwdoms_aux_d, POWER_DOMAIN_AUX_D);
666-
I915_DECL_PW_DOMAINS(icl_pwdoms_aux_e, POWER_DOMAIN_AUX_E);
667-
I915_DECL_PW_DOMAINS(icl_pwdoms_aux_f, POWER_DOMAIN_AUX_F);
693+
I915_DECL_PW_DOMAINS(icl_pwdoms_aux_b,
694+
POWER_DOMAIN_AUX_IO_B,
695+
POWER_DOMAIN_AUX_B);
696+
I915_DECL_PW_DOMAINS(icl_pwdoms_aux_c,
697+
POWER_DOMAIN_AUX_IO_C,
698+
POWER_DOMAIN_AUX_C);
699+
I915_DECL_PW_DOMAINS(icl_pwdoms_aux_d,
700+
POWER_DOMAIN_AUX_IO_D,
701+
POWER_DOMAIN_AUX_D);
702+
I915_DECL_PW_DOMAINS(icl_pwdoms_aux_e,
703+
POWER_DOMAIN_AUX_IO_E,
704+
POWER_DOMAIN_AUX_E);
705+
I915_DECL_PW_DOMAINS(icl_pwdoms_aux_f,
706+
POWER_DOMAIN_AUX_IO_F,
707+
POWER_DOMAIN_AUX_F);
668708
I915_DECL_PW_DOMAINS(icl_pwdoms_aux_tbt1, POWER_DOMAIN_AUX_TBT1);
669709
I915_DECL_PW_DOMAINS(icl_pwdoms_aux_tbt2, POWER_DOMAIN_AUX_TBT2);
670710
I915_DECL_PW_DOMAINS(icl_pwdoms_aux_tbt3, POWER_DOMAIN_AUX_TBT3);
@@ -1215,6 +1255,9 @@ I915_DECL_PW_DOMAINS(xelpd_pwdoms_pw_a,
12151255
POWER_DOMAIN_PORT_DDI_LANES_TC4, \
12161256
POWER_DOMAIN_VGA, \
12171257
POWER_DOMAIN_AUDIO_PLAYBACK, \
1258+
POWER_DOMAIN_AUX_IO_C, \
1259+
POWER_DOMAIN_AUX_IO_D, \
1260+
POWER_DOMAIN_AUX_IO_E, \
12181261
POWER_DOMAIN_AUX_C, \
12191262
POWER_DOMAIN_AUX_D, \
12201263
POWER_DOMAIN_AUX_E, \

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