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Rajendra Nayakandersson
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spi: spi-qcom-qspi: Use OPP API to set clk/perf state
QSPI needs to vote on a performance state of a power domain depending on the clock rate. Add support for it by specifying the perf state/clock rate as an OPP table in device tree. Signed-off-by: Rajendra Nayak <[email protected]> Reviewed-by: Matthias Kaehlcke <[email protected]> Acked-by: Mark Brown <[email protected]> Cc: Alok Chauhan <[email protected]> Cc: Akash Asthana <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
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drivers/spi/spi-qcom-qspi.c

Lines changed: 27 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@
99
#include <linux/of.h>
1010
#include <linux/of_platform.h>
1111
#include <linux/pm_runtime.h>
12+
#include <linux/pm_opp.h>
1213
#include <linux/spi/spi.h>
1314
#include <linux/spi/spi-mem.h>
1415

@@ -141,6 +142,8 @@ struct qcom_qspi {
141142
struct clk_bulk_data *clks;
142143
struct qspi_xfer xfer;
143144
struct icc_path *icc_path_cpu_to_qspi;
145+
struct opp_table *opp_table;
146+
bool has_opp_table;
144147
/* Lock to protect data accessed by IRQs */
145148
spinlock_t lock;
146149
};
@@ -238,7 +241,7 @@ static int qcom_qspi_transfer_one(struct spi_master *master,
238241
speed_hz = xfer->speed_hz;
239242

240243
/* In regular operation (SBL_EN=1) core must be 4x transfer clock */
241-
ret = clk_set_rate(ctrl->clks[QSPI_CLK_CORE].clk, speed_hz * 4);
244+
ret = dev_pm_opp_set_rate(ctrl->dev, speed_hz * 4);
242245
if (ret) {
243246
dev_err(ctrl->dev, "Failed to set core clk %d\n", ret);
244247
return ret;
@@ -519,13 +522,30 @@ static int qcom_qspi_probe(struct platform_device *pdev)
519522
master->handle_err = qcom_qspi_handle_err;
520523
master->auto_runtime_pm = true;
521524

525+
ctrl->opp_table = dev_pm_opp_set_clkname(&pdev->dev, "core");
526+
if (IS_ERR(ctrl->opp_table)) {
527+
ret = PTR_ERR(ctrl->opp_table);
528+
goto exit_probe_master_put;
529+
}
530+
/* OPP table is optional */
531+
ret = dev_pm_opp_of_add_table(&pdev->dev);
532+
if (!ret) {
533+
ctrl->has_opp_table = true;
534+
} else if (ret != -ENODEV) {
535+
dev_err(&pdev->dev, "invalid OPP table in device tree\n");
536+
goto exit_probe_master_put;
537+
}
538+
522539
pm_runtime_enable(dev);
523540

524541
ret = spi_register_master(master);
525542
if (!ret)
526543
return 0;
527544

528545
pm_runtime_disable(dev);
546+
if (ctrl->has_opp_table)
547+
dev_pm_opp_of_remove_table(&pdev->dev);
548+
dev_pm_opp_put_clkname(ctrl->opp_table);
529549

530550
exit_probe_master_put:
531551
spi_master_put(master);
@@ -536,11 +556,15 @@ static int qcom_qspi_probe(struct platform_device *pdev)
536556
static int qcom_qspi_remove(struct platform_device *pdev)
537557
{
538558
struct spi_master *master = platform_get_drvdata(pdev);
559+
struct qcom_qspi *ctrl = spi_master_get_devdata(master);
539560

540561
/* Unregister _before_ disabling pm_runtime() so we stop transfers */
541562
spi_unregister_master(master);
542563

543564
pm_runtime_disable(&pdev->dev);
565+
if (ctrl->has_opp_table)
566+
dev_pm_opp_of_remove_table(&pdev->dev);
567+
dev_pm_opp_put_clkname(ctrl->opp_table);
544568

545569
return 0;
546570
}
@@ -551,6 +575,8 @@ static int __maybe_unused qcom_qspi_runtime_suspend(struct device *dev)
551575
struct qcom_qspi *ctrl = spi_master_get_devdata(master);
552576
int ret;
553577

578+
/* Drop the performance state vote */
579+
dev_pm_opp_set_rate(dev, 0);
554580
clk_bulk_disable_unprepare(QSPI_NUM_CLKS, ctrl->clks);
555581

556582
ret = icc_disable(ctrl->icc_path_cpu_to_qspi);

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