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dt-bindings: soc: ti: pruss: Add clocks for ICSSG
The ICSSG module has 7 clocks for each instance. These clocks are ICSSG0_CORE_CLK, ICSSG0_IEP_CLK, ICSSG0_ICLK, ICSSG0_UART_CLK, RGMII_MHZ_250_CLK, RGMII_MHZ_50_CLK and RGMII_MHZ_5_CLK These clocks are described in AM64x TRM Section 6.4.3 Table 6-398. Add these clocks to the dt binding of ICSSG. Link: https://www.ti.com/lit/pdf/spruim2 (AM64x TRM) Signed-off-by: MD Danish Anwar <[email protected]> Reviewed-by: Roger Quadros <[email protected]> Acked-by: Conor Dooley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Nishanth Menon <[email protected]>
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Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml

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description: |
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This property is as per sci-pm-domain.txt.
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clocks:
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items:
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- description: ICSSG_CORE Clock
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- description: ICSSG_IEP Clock
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- description: ICSSG_RGMII_MHZ_250 Clock
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- description: ICSSG_RGMII_MHZ_50 Clock
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- description: ICSSG_RGMII_MHZ_5 Clock
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- description: ICSSG_UART Clock
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- description: ICSSG_ICLK Clock
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patternProperties:
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memories@[a-f0-9]+$:

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