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Commit f801efb

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Ben Skeggs
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drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_dither()
Signed-off-by: Ben Skeggs <[email protected]> Reviewed-by: Lyude Paul <[email protected]>
1 parent 35cefc5 commit f801efb

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6 files changed

+42
-22
lines changed

6 files changed

+42
-22
lines changed

‎drivers/gpu/drm/nouveau/dispnv50/head.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -106,9 +106,9 @@ nv50_head_atomic_check_dither(struct nv50_head_atom *armh,
106106
}
107107
}
108108

109-
asyh->dither.enable = mode;
110-
asyh->dither.bits = mode >> 1;
111-
asyh->dither.mode = mode >> 3;
109+
asyh->dither.enable = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, ENABLE);
110+
asyh->dither.bits = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, BITS);
111+
asyh->dither.mode = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, MODE);
112112
asyh->set.dither = true;
113113
}
114114

‎drivers/gpu/drm/nouveau/dispnv50/head507d.c

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -51,9 +51,11 @@ head507d_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
5151
if ((ret = PUSH_WAIT(push, 2)))
5252
return ret;
5353

54-
PUSH_NVSQ(push, NV507D, 0x08a0 + (i * 0x400), asyh->dither.mode << 3 |
55-
asyh->dither.bits << 1 |
56-
asyh->dither.enable);
54+
PUSH_MTHD(push, NV507D, HEAD_SET_DITHER_CONTROL(i),
55+
NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |
56+
NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
57+
NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |
58+
NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, PHASE, 0));
5759
return 0;
5860
}
5961

‎drivers/gpu/drm/nouveau/dispnv50/head907d.c

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -78,9 +78,11 @@ head907d_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
7878
if ((ret = PUSH_WAIT(push, 2)))
7979
return ret;
8080

81-
PUSH_NVSQ(push, NV907D, 0x0490 + (i * 0x300), asyh->dither.mode << 3 |
82-
asyh->dither.bits << 1 |
83-
asyh->dither.enable);
81+
PUSH_MTHD(push, NV907D, HEAD_SET_DITHER_CONTROL(i),
82+
NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |
83+
NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
84+
NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |
85+
NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, PHASE, 0));
8486
return 0;
8587
}
8688

‎drivers/gpu/drm/nouveau/dispnv50/head917d.c

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -36,9 +36,11 @@ head917d_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
3636
if ((ret = PUSH_WAIT(push, 2)))
3737
return ret;
3838

39-
PUSH_NVSQ(push, NV917D, 0x04a0 + (i * 0x300), asyh->dither.mode << 3 |
40-
asyh->dither.bits << 1 |
41-
asyh->dither.enable);
39+
PUSH_MTHD(push, NV917D, HEAD_SET_DITHER_CONTROL(i),
40+
NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |
41+
NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
42+
NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |
43+
NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, PHASE, 0));
4244
return 0;
4345
}
4446

‎drivers/gpu/drm/nouveau/dispnv50/headc37d.c

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -85,9 +85,12 @@ headc37d_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
8585
if ((ret = PUSH_WAIT(push, 2)))
8686
return ret;
8787

88-
PUSH_NVSQ(push, NV907D, 0x2018 + (i * 0x400), asyh->dither.mode << 8 |
89-
asyh->dither.bits << 4 |
90-
asyh->dither.enable);
88+
PUSH_MTHD(push, NVC37D, HEAD_SET_DITHER_CONTROL(i),
89+
NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |
90+
NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
91+
NVDEF(NVC37D, HEAD_SET_DITHER_CONTROL, OFFSET_ENABLE, DISABLE) |
92+
NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |
93+
NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, PHASE, 0));
9194
return 0;
9295
}
9396

‎drivers/gpu/drm/nouveau/nouveau_connector.h

Lines changed: 18 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,10 @@
2929

3030
#include <nvif/notify.h>
3131

32+
#include <nvhw/class/cl507d.h>
33+
#include <nvhw/class/cl907d.h>
34+
#include <nvhw/drf.h>
35+
3236
#include <drm/drm_crtc.h>
3337
#include <drm/drm_edid.h>
3438
#include <drm/drm_encoder.h>
@@ -56,16 +60,23 @@ struct nouveau_conn_atom {
5660
* hw values, and the code relies on this.
5761
*/
5862
enum {
59-
DITHERING_MODE_OFF = 0x00,
60-
DITHERING_MODE_ON = 0x01,
61-
DITHERING_MODE_DYNAMIC2X2 = 0x10 | DITHERING_MODE_ON,
62-
DITHERING_MODE_STATIC2X2 = 0x18 | DITHERING_MODE_ON,
63-
DITHERING_MODE_TEMPORAL = 0x20 | DITHERING_MODE_ON,
63+
DITHERING_MODE_OFF =
64+
NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, DISABLE),
65+
DITHERING_MODE_ON =
66+
NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, ENABLE),
67+
DITHERING_MODE_DYNAMIC2X2 = DITHERING_MODE_ON |
68+
NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, MODE, DYNAMIC_2X2),
69+
DITHERING_MODE_STATIC2X2 = DITHERING_MODE_ON |
70+
NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, MODE, STATIC_2X2),
71+
DITHERING_MODE_TEMPORAL = DITHERING_MODE_ON |
72+
NVDEF(NV907D, HEAD_SET_DITHER_CONTROL, MODE, TEMPORAL),
6473
DITHERING_MODE_AUTO
6574
} mode;
6675
enum {
67-
DITHERING_DEPTH_6BPC = 0x00,
68-
DITHERING_DEPTH_8BPC = 0x02,
76+
DITHERING_DEPTH_6BPC =
77+
NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, BITS, DITHER_TO_6_BITS),
78+
DITHERING_DEPTH_8BPC =
79+
NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, BITS, DITHER_TO_8_BITS),
6980
DITHERING_DEPTH_AUTO
7081
} depth;
7182
} dither;

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