We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 40dad89 commit f87f3b8Copy full SHA for f87f3b8
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -302,7 +302,7 @@ static void dpu_encoder_phys_vid_setup_timing_engine(
302
intf_cfg.stream_sel = 0; /* Don't care value for video mode */
303
intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc);
304
intf_cfg.dsc = dpu_encoder_helper_get_dsc(phys_enc);
305
- if (phys_enc->hw_pp->merge_3d)
+ if (intf_cfg.mode_3d && phys_enc->hw_pp->merge_3d)
306
intf_cfg.merge_3d = phys_enc->hw_pp->merge_3d->idx;
307
308
spin_lock_irqsave(phys_enc->enc_spinlock, lock_flags);
0 commit comments