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| 1 | +# SPDX-License-Identifier: GPL-2.0-only |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/gpio/mrvl-gpio.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: Marvell PXA GPIO controller |
| 8 | + |
| 9 | +maintainers: |
| 10 | + - Linus Walleij <[email protected]> |
| 11 | + - Bartosz Golaszewski <[email protected]> |
| 12 | + |
| 13 | + |
| 14 | +allOf: |
| 15 | + - if: |
| 16 | + properties: |
| 17 | + compatible: |
| 18 | + contains: |
| 19 | + enum: |
| 20 | + - intel,pxa25x-gpio |
| 21 | + - intel,pxa26x-gpio |
| 22 | + - intel,pxa27x-gpio |
| 23 | + - intel,pxa3xx-gpio |
| 24 | + then: |
| 25 | + properties: |
| 26 | + interrupts: |
| 27 | + minItems: 3 |
| 28 | + maxItems: 3 |
| 29 | + interrupt-names: |
| 30 | + items: |
| 31 | + - const: gpio0 |
| 32 | + - const: gpio1 |
| 33 | + - const: gpio_mux |
| 34 | + - if: |
| 35 | + properties: |
| 36 | + compatible: |
| 37 | + contains: |
| 38 | + enum: |
| 39 | + - marvell,mmp-gpio |
| 40 | + - marvell,mmp2-gpio |
| 41 | + then: |
| 42 | + properties: |
| 43 | + interrupts: |
| 44 | + maxItems: 1 |
| 45 | + interrupt-names: |
| 46 | + items: |
| 47 | + - const: gpio_mux |
| 48 | + |
| 49 | +properties: |
| 50 | + $nodename: |
| 51 | + pattern: '^gpio@[0-9a-f]+$' |
| 52 | + |
| 53 | + compatible: |
| 54 | + enum: |
| 55 | + - intel,pxa25x-gpio |
| 56 | + - intel,pxa26x-gpio |
| 57 | + - intel,pxa27x-gpio |
| 58 | + - intel,pxa3xx-gpio |
| 59 | + - marvell,mmp-gpio |
| 60 | + - marvell,mmp2-gpio |
| 61 | + - marvell,pxa93x-gpio |
| 62 | + |
| 63 | + reg: |
| 64 | + maxItems: 1 |
| 65 | + |
| 66 | + clocks: |
| 67 | + maxItems: 1 |
| 68 | + |
| 69 | + resets: |
| 70 | + maxItems: 1 |
| 71 | + |
| 72 | + ranges: true |
| 73 | + |
| 74 | + '#address-cells': |
| 75 | + const: 1 |
| 76 | + |
| 77 | + '#size-cells': |
| 78 | + const: 1 |
| 79 | + |
| 80 | + gpio-controller: true |
| 81 | + |
| 82 | + '#gpio-cells': |
| 83 | + const: 2 |
| 84 | + |
| 85 | + gpio-ranges: |
| 86 | + maxItems: 1 |
| 87 | + |
| 88 | + interrupts: true |
| 89 | + |
| 90 | + interrupt-names: true |
| 91 | + |
| 92 | + interrupt-controller: true |
| 93 | + |
| 94 | + '#interrupt-cells': |
| 95 | + const: 2 |
| 96 | + |
| 97 | +patternProperties: |
| 98 | + '^gpio@[0-9a-f]*$': |
| 99 | + type: object |
| 100 | + properties: |
| 101 | + reg: |
| 102 | + maxItems: 1 |
| 103 | + |
| 104 | + required: |
| 105 | + - reg |
| 106 | + |
| 107 | + additionalProperties: false |
| 108 | + |
| 109 | +required: |
| 110 | + - compatible |
| 111 | + - '#address-cells' |
| 112 | + - '#size-cells' |
| 113 | + - reg |
| 114 | + - gpio-controller |
| 115 | + - '#gpio-cells' |
| 116 | + - interrupts |
| 117 | + - interrupt-names |
| 118 | + - interrupt-controller |
| 119 | + - '#interrupt-cells' |
| 120 | + |
| 121 | +additionalProperties: false |
| 122 | + |
| 123 | +examples: |
| 124 | + - | |
| 125 | + #include <dt-bindings/clock/pxa-clock.h> |
| 126 | + gpio@40e00000 { |
| 127 | + compatible = "intel,pxa3xx-gpio"; |
| 128 | + #address-cells = <1>; |
| 129 | + #size-cells = <1>; |
| 130 | + reg = <0x40e00000 0x10000>; |
| 131 | + gpio-controller; |
| 132 | + #gpio-cells = <2>; |
| 133 | + interrupts = <8>, <9>, <10>; |
| 134 | + interrupt-names = "gpio0", "gpio1", "gpio_mux"; |
| 135 | + clocks = <&clks CLK_GPIO>; |
| 136 | + interrupt-controller; |
| 137 | + #interrupt-cells = <2>; |
| 138 | + }; |
| 139 | + - | |
| 140 | + #include <dt-bindings/clock/marvell,pxa910.h> |
| 141 | + gpio@d4019000 { |
| 142 | + compatible = "marvell,mmp-gpio"; |
| 143 | + #address-cells = <1>; |
| 144 | + #size-cells = <1>; |
| 145 | + reg = <0xd4019000 0x1000>; |
| 146 | + gpio-controller; |
| 147 | + #gpio-cells = <2>; |
| 148 | + interrupts = <49>; |
| 149 | + interrupt-names = "gpio_mux"; |
| 150 | + clocks = <&soc_clocks PXA910_CLK_GPIO>; |
| 151 | + resets = <&soc_clocks PXA910_CLK_GPIO>; |
| 152 | + interrupt-controller; |
| 153 | + #interrupt-cells = <2>; |
| 154 | + ranges; |
| 155 | +
|
| 156 | + gpio@d4019000 { |
| 157 | + reg = <0xd4019000 0x4>; |
| 158 | + }; |
| 159 | +
|
| 160 | + gpio@d4019004 { |
| 161 | + reg = <0xd4019004 0x4>; |
| 162 | + }; |
| 163 | +
|
| 164 | + gpio@d4019008 { |
| 165 | + reg = <0xd4019008 0x4>; |
| 166 | + }; |
| 167 | +
|
| 168 | + gpio@d4019100 { |
| 169 | + reg = <0xd4019100 0x4>; |
| 170 | + }; |
| 171 | + }; |
| 172 | +
|
| 173 | +... |
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