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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
| 2 | +/* |
| 3 | + * Driver for Epson RX8111 RTC. |
| 4 | + * |
| 5 | + * Copyright (C) 2023 Axis Communications AB |
| 6 | + */ |
| 7 | + |
| 8 | +#include <linux/bcd.h> |
| 9 | +#include <linux/bitfield.h> |
| 10 | +#include <linux/i2c.h> |
| 11 | +#include <linux/module.h> |
| 12 | +#include <linux/regmap.h> |
| 13 | + |
| 14 | +#include <linux/rtc.h> |
| 15 | + |
| 16 | +#define RX8111_REG_SEC 0x10 /* Second counter. */ |
| 17 | +#define RX8111_REG_MIN 0x11 /* Minute counter */ |
| 18 | +#define RX8111_REG_HOUR 0x12 /* Hour counter. */ |
| 19 | +#define RX8111_REG_WEEK 0x13 /* Week day counter. */ |
| 20 | +#define RX8111_REG_DAY 0x14 /* Month day counter. */ |
| 21 | +#define RX8111_REG_MONTH 0x15 /* Month counter. */ |
| 22 | +#define RX8111_REG_YEAR 0x16 /* Year counter. */ |
| 23 | + |
| 24 | +#define RX8111_REG_ALARM_MIN 0x17 /* Alarm minute. */ |
| 25 | +#define RX8111_REG_ALARM_HOUR 0x18 /* Alarm hour. */ |
| 26 | +#define RX8111_REG_ALARM_WEEK_DAY 0x19 /* Alarm week or month day. */ |
| 27 | + |
| 28 | +#define RX8111_REG_TIMER_COUNTER0 0x1a /* Timer counter LSB. */ |
| 29 | +#define RX8111_REG_TIMER_COUNTER1 0x1b /* Timer counter. */ |
| 30 | +#define RX8111_REG_TIMER_COUNTER2 0x1c /* Timer counter MSB. */ |
| 31 | + |
| 32 | +#define RX8111_REG_EXT 0x1d /* Extension register. */ |
| 33 | +#define RX8111_REG_FLAG 0x1e /* Flag register. */ |
| 34 | +#define RX8111_REG_CTRL 0x1f /* Control register. */ |
| 35 | + |
| 36 | +#define RX8111_REG_TS_1_1000_SEC 0x20 /* Timestamp 256 or 512 Hz . */ |
| 37 | +#define RX8111_REG_TS_1_100_SEC 0x21 /* Timestamp 1 - 128 Hz. */ |
| 38 | +#define RX8111_REG_TS_SEC 0x22 /* Timestamp second. */ |
| 39 | +#define RX8111_REG_TS_MIN 0x23 /* Timestamp minute. */ |
| 40 | +#define RX8111_REG_TS_HOUR 0x24 /* Timestamp hour. */ |
| 41 | +#define RX8111_REG_TS_WEEK 0x25 /* Timestamp week day. */ |
| 42 | +#define RX8111_REG_TS_DAY 0x26 /* Timestamp month day. */ |
| 43 | +#define RX8111_REG_TS_MONTH 0x27 /* Timestamp month. */ |
| 44 | +#define RX8111_REG_TS_YEAR 0x28 /* Timestamp year. */ |
| 45 | +#define RX8111_REG_TS_STATUS 0x29 /* Timestamp status. */ |
| 46 | + |
| 47 | +#define RX8111_REG_EVIN_SETTING 0x2b /* Timestamp trigger setting. */ |
| 48 | +#define RX8111_REG_ALARM_SEC 0x2c /* Alarm second. */ |
| 49 | +#define RX8111_REG_TIMER_CTRL 0x2d /* Timer control. */ |
| 50 | +#define RX8111_REG_TS_CTRL0 0x2e /* Timestamp control 0. */ |
| 51 | +#define RX8111_REG_CMD_TRIGGER 0x2f /* Timestamp trigger. */ |
| 52 | +#define RX8111_REG_PWR_SWITCH_CTRL 0x32 /* Power switch control. */ |
| 53 | +#define RX8111_REG_STATUS_MON 0x33 /* Status monitor. */ |
| 54 | +#define RX8111_REG_TS_CTRL1 0x34 /* Timestamp control 1. */ |
| 55 | +#define RX8111_REG_TS_CTRL2 0x35 /* Timestamp control 2. */ |
| 56 | +#define RX8111_REG_TS_CTRL3 0x36 /* Timestamp control 3. */ |
| 57 | + |
| 58 | +#define RX8111_FLAG_XST_BIT BIT(0) |
| 59 | +#define RX8111_FLAG_VLF_BIT BIT(1) |
| 60 | + |
| 61 | +#define RX8111_TIME_BUF_SZ (RX8111_REG_YEAR - RX8111_REG_SEC + 1) |
| 62 | + |
| 63 | +enum rx8111_regfield { |
| 64 | + /* RX8111_REG_EXT. */ |
| 65 | + RX8111_REGF_TSEL0, |
| 66 | + RX8111_REGF_TSEL1, |
| 67 | + RX8111_REGF_ETS, |
| 68 | + RX8111_REGF_WADA, |
| 69 | + RX8111_REGF_TE, |
| 70 | + RX8111_REGF_USEL, |
| 71 | + RX8111_REGF_FSEL0, |
| 72 | + RX8111_REGF_FSEL1, |
| 73 | + |
| 74 | + /* RX8111_REG_FLAG. */ |
| 75 | + RX8111_REGF_XST, |
| 76 | + RX8111_REGF_VLF, |
| 77 | + RX8111_REGF_EVF, |
| 78 | + RX8111_REGF_AF, |
| 79 | + RX8111_REGF_TF, |
| 80 | + RX8111_REGF_UF, |
| 81 | + RX8111_REGF_POR, |
| 82 | + |
| 83 | + /* RX8111_REG_CTRL. */ |
| 84 | + RX8111_REGF_STOP, |
| 85 | + RX8111_REGF_EIE, |
| 86 | + RX8111_REGF_AIE, |
| 87 | + RX8111_REGF_TIE, |
| 88 | + RX8111_REGF_UIE, |
| 89 | + |
| 90 | + /* RX8111_REG_PWR_SWITCH_CTRL. */ |
| 91 | + RX8111_REGF_SMPT0, |
| 92 | + RX8111_REGF_SMPT1, |
| 93 | + RX8111_REGF_SWSEL0, |
| 94 | + RX8111_REGF_SWSEL1, |
| 95 | + RX8111_REGF_INIEN, |
| 96 | + RX8111_REGF_CHGEN, |
| 97 | + |
| 98 | + /* Sentinel value. */ |
| 99 | + RX8111_REGF_MAX |
| 100 | +}; |
| 101 | + |
| 102 | +static const struct reg_field rx8111_regfields[] = { |
| 103 | + [RX8111_REGF_TSEL0] = REG_FIELD(RX8111_REG_EXT, 0, 0), |
| 104 | + [RX8111_REGF_TSEL1] = REG_FIELD(RX8111_REG_EXT, 1, 1), |
| 105 | + [RX8111_REGF_ETS] = REG_FIELD(RX8111_REG_EXT, 2, 2), |
| 106 | + [RX8111_REGF_WADA] = REG_FIELD(RX8111_REG_EXT, 3, 3), |
| 107 | + [RX8111_REGF_TE] = REG_FIELD(RX8111_REG_EXT, 4, 4), |
| 108 | + [RX8111_REGF_USEL] = REG_FIELD(RX8111_REG_EXT, 5, 5), |
| 109 | + [RX8111_REGF_FSEL0] = REG_FIELD(RX8111_REG_EXT, 6, 6), |
| 110 | + [RX8111_REGF_FSEL1] = REG_FIELD(RX8111_REG_EXT, 7, 7), |
| 111 | + |
| 112 | + [RX8111_REGF_XST] = REG_FIELD(RX8111_REG_FLAG, 0, 0), |
| 113 | + [RX8111_REGF_VLF] = REG_FIELD(RX8111_REG_FLAG, 1, 1), |
| 114 | + [RX8111_REGF_EVF] = REG_FIELD(RX8111_REG_FLAG, 2, 2), |
| 115 | + [RX8111_REGF_AF] = REG_FIELD(RX8111_REG_FLAG, 3, 3), |
| 116 | + [RX8111_REGF_TF] = REG_FIELD(RX8111_REG_FLAG, 4, 4), |
| 117 | + [RX8111_REGF_UF] = REG_FIELD(RX8111_REG_FLAG, 5, 5), |
| 118 | + [RX8111_REGF_POR] = REG_FIELD(RX8111_REG_FLAG, 7, 7), |
| 119 | + |
| 120 | + [RX8111_REGF_STOP] = REG_FIELD(RX8111_REG_CTRL, 0, 0), |
| 121 | + [RX8111_REGF_EIE] = REG_FIELD(RX8111_REG_CTRL, 2, 2), |
| 122 | + [RX8111_REGF_AIE] = REG_FIELD(RX8111_REG_CTRL, 3, 3), |
| 123 | + [RX8111_REGF_TIE] = REG_FIELD(RX8111_REG_CTRL, 4, 4), |
| 124 | + [RX8111_REGF_UIE] = REG_FIELD(RX8111_REG_CTRL, 5, 5), |
| 125 | + |
| 126 | + [RX8111_REGF_SMPT0] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 0, 0), |
| 127 | + [RX8111_REGF_SMPT1] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 1, 1), |
| 128 | + [RX8111_REGF_SWSEL0] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 2, 2), |
| 129 | + [RX8111_REGF_SWSEL1] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 3, 3), |
| 130 | + [RX8111_REGF_INIEN] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 6, 6), |
| 131 | + [RX8111_REGF_CHGEN] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 7, 7), |
| 132 | +}; |
| 133 | + |
| 134 | +static const struct regmap_config rx8111_regmap_config = { |
| 135 | + .reg_bits = 8, |
| 136 | + .val_bits = 8, |
| 137 | + .max_register = RX8111_REG_TS_CTRL3, |
| 138 | +}; |
| 139 | + |
| 140 | +struct rx8111_data { |
| 141 | + struct regmap *regmap; |
| 142 | + struct regmap_field *regfields[RX8111_REGF_MAX]; |
| 143 | + struct device *dev; |
| 144 | + struct rtc_device *rtc; |
| 145 | +}; |
| 146 | + |
| 147 | +static int rx8111_read_vl_flag(struct rx8111_data *data, unsigned int *vlval) |
| 148 | +{ |
| 149 | + int ret; |
| 150 | + |
| 151 | + ret = regmap_field_read(data->regfields[RX8111_REGF_VLF], vlval); |
| 152 | + if (ret) |
| 153 | + dev_dbg(data->dev, "Could not read VL flag (%d)", ret); |
| 154 | + |
| 155 | + return ret; |
| 156 | +} |
| 157 | + |
| 158 | +static int rx8111_read_time(struct device *dev, struct rtc_time *tm) |
| 159 | +{ |
| 160 | + struct rx8111_data *data = dev_get_drvdata(dev); |
| 161 | + u8 buf[RX8111_TIME_BUF_SZ]; |
| 162 | + unsigned int regval; |
| 163 | + int ret; |
| 164 | + |
| 165 | + /* Check status. */ |
| 166 | + ret = regmap_read(data->regmap, RX8111_REG_FLAG, ®val); |
| 167 | + if (ret) { |
| 168 | + dev_dbg(data->dev, "Could not read flag register (%d)\n", ret); |
| 169 | + return ret; |
| 170 | + } |
| 171 | + |
| 172 | + if (FIELD_GET(RX8111_FLAG_XST_BIT, regval)) { |
| 173 | + dev_warn(data->dev, |
| 174 | + "Crystal oscillation stopped, time is not reliable\n"); |
| 175 | + return -EINVAL; |
| 176 | + } |
| 177 | + |
| 178 | + if (FIELD_GET(RX8111_FLAG_VLF_BIT, regval)) { |
| 179 | + dev_warn(data->dev, |
| 180 | + "Low voltage detected, time is not reliable\n"); |
| 181 | + return -EINVAL; |
| 182 | + } |
| 183 | + |
| 184 | + ret = regmap_field_read(data->regfields[RX8111_REGF_STOP], ®val); |
| 185 | + if (ret) { |
| 186 | + dev_dbg(data->dev, "Could not read clock status (%d)\n", ret); |
| 187 | + return ret; |
| 188 | + } |
| 189 | + |
| 190 | + if (regval) { |
| 191 | + dev_warn(data->dev, "Clock stopped, time is not reliable\n"); |
| 192 | + return -EINVAL; |
| 193 | + } |
| 194 | + |
| 195 | + /* Read time. */ |
| 196 | + ret = regmap_bulk_read(data->regmap, RX8111_REG_SEC, buf, |
| 197 | + ARRAY_SIZE(buf)); |
| 198 | + if (ret) { |
| 199 | + dev_dbg(data->dev, "Could not bulk read time (%d)\n", ret); |
| 200 | + return ret; |
| 201 | + } |
| 202 | + |
| 203 | + tm->tm_sec = bcd2bin(buf[0]); |
| 204 | + tm->tm_min = bcd2bin(buf[1]); |
| 205 | + tm->tm_hour = bcd2bin(buf[2]); |
| 206 | + tm->tm_wday = ffs(buf[3]) - 1; |
| 207 | + tm->tm_mday = bcd2bin(buf[4]); |
| 208 | + tm->tm_mon = bcd2bin(buf[5]) - 1; |
| 209 | + tm->tm_year = bcd2bin(buf[6]) + 100; |
| 210 | + |
| 211 | + return 0; |
| 212 | +} |
| 213 | + |
| 214 | +static int rx8111_set_time(struct device *dev, struct rtc_time *tm) |
| 215 | +{ |
| 216 | + struct rx8111_data *data = dev_get_drvdata(dev); |
| 217 | + u8 buf[RX8111_TIME_BUF_SZ]; |
| 218 | + int ret; |
| 219 | + |
| 220 | + buf[0] = bin2bcd(tm->tm_sec); |
| 221 | + buf[1] = bin2bcd(tm->tm_min); |
| 222 | + buf[2] = bin2bcd(tm->tm_hour); |
| 223 | + buf[3] = BIT(tm->tm_wday); |
| 224 | + buf[4] = bin2bcd(tm->tm_mday); |
| 225 | + buf[5] = bin2bcd(tm->tm_mon + 1); |
| 226 | + buf[6] = bin2bcd(tm->tm_year - 100); |
| 227 | + |
| 228 | + ret = regmap_clear_bits(data->regmap, RX8111_REG_FLAG, |
| 229 | + RX8111_FLAG_XST_BIT | RX8111_FLAG_VLF_BIT); |
| 230 | + if (ret) |
| 231 | + return ret; |
| 232 | + |
| 233 | + /* Stop the clock. */ |
| 234 | + ret = regmap_field_write(data->regfields[RX8111_REGF_STOP], 1); |
| 235 | + if (ret) { |
| 236 | + dev_dbg(data->dev, "Could not stop the clock (%d)\n", ret); |
| 237 | + return ret; |
| 238 | + } |
| 239 | + |
| 240 | + /* Set the time. */ |
| 241 | + ret = regmap_bulk_write(data->regmap, RX8111_REG_SEC, buf, |
| 242 | + ARRAY_SIZE(buf)); |
| 243 | + if (ret) { |
| 244 | + dev_dbg(data->dev, "Could not bulk write time (%d)\n", ret); |
| 245 | + |
| 246 | + /* |
| 247 | + * We don't bother with trying to start the clock again. We |
| 248 | + * check for this in rx8111_read_time() (and thus force user to |
| 249 | + * call rx8111_set_time() to try again). |
| 250 | + */ |
| 251 | + return ret; |
| 252 | + } |
| 253 | + |
| 254 | + /* Start the clock. */ |
| 255 | + ret = regmap_field_write(data->regfields[RX8111_REGF_STOP], 0); |
| 256 | + if (ret) { |
| 257 | + dev_dbg(data->dev, "Could not start the clock (%d)\n", ret); |
| 258 | + return ret; |
| 259 | + } |
| 260 | + |
| 261 | + return 0; |
| 262 | +} |
| 263 | + |
| 264 | +static int rx8111_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) |
| 265 | +{ |
| 266 | + struct rx8111_data *data = dev_get_drvdata(dev); |
| 267 | + unsigned int regval; |
| 268 | + unsigned int vlval; |
| 269 | + int ret; |
| 270 | + |
| 271 | + switch (cmd) { |
| 272 | + case RTC_VL_READ: |
| 273 | + ret = rx8111_read_vl_flag(data, ®val); |
| 274 | + if (ret) |
| 275 | + return ret; |
| 276 | + |
| 277 | + vlval = regval ? RTC_VL_DATA_INVALID : 0; |
| 278 | + |
| 279 | + return put_user(vlval, (typeof(vlval) __user *)arg); |
| 280 | + default: |
| 281 | + return -ENOIOCTLCMD; |
| 282 | + } |
| 283 | +} |
| 284 | + |
| 285 | +static const struct rtc_class_ops rx8111_rtc_ops = { |
| 286 | + .read_time = rx8111_read_time, |
| 287 | + .set_time = rx8111_set_time, |
| 288 | + .ioctl = rx8111_ioctl, |
| 289 | +}; |
| 290 | + |
| 291 | +static int rx8111_probe(struct i2c_client *client) |
| 292 | +{ |
| 293 | + struct rx8111_data *data; |
| 294 | + struct rtc_device *rtc; |
| 295 | + size_t i; |
| 296 | + |
| 297 | + data = devm_kmalloc(&client->dev, sizeof(*data), GFP_KERNEL); |
| 298 | + if (!data) { |
| 299 | + dev_dbg(&client->dev, "Could not allocate device data\n"); |
| 300 | + return -ENOMEM; |
| 301 | + } |
| 302 | + |
| 303 | + data->dev = &client->dev; |
| 304 | + dev_set_drvdata(data->dev, data); |
| 305 | + |
| 306 | + data->regmap = devm_regmap_init_i2c(client, &rx8111_regmap_config); |
| 307 | + if (IS_ERR(data->regmap)) { |
| 308 | + dev_dbg(data->dev, "Could not initialize regmap\n"); |
| 309 | + return PTR_ERR(data->regmap); |
| 310 | + } |
| 311 | + |
| 312 | + for (i = 0; i < RX8111_REGF_MAX; ++i) { |
| 313 | + data->regfields[i] = devm_regmap_field_alloc( |
| 314 | + data->dev, data->regmap, rx8111_regfields[i]); |
| 315 | + if (IS_ERR(data->regfields[i])) { |
| 316 | + dev_dbg(data->dev, |
| 317 | + "Could not allocate register field %zu\n", i); |
| 318 | + return PTR_ERR(data->regfields[i]); |
| 319 | + } |
| 320 | + } |
| 321 | + |
| 322 | + rtc = devm_rtc_allocate_device(data->dev); |
| 323 | + if (IS_ERR(rtc)) { |
| 324 | + dev_dbg(data->dev, "Could not allocate rtc device\n"); |
| 325 | + return PTR_ERR(rtc); |
| 326 | + } |
| 327 | + |
| 328 | + rtc->ops = &rx8111_rtc_ops; |
| 329 | + rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; |
| 330 | + rtc->range_max = RTC_TIMESTAMP_END_2099; |
| 331 | + |
| 332 | + clear_bit(RTC_FEATURE_ALARM, rtc->features); |
| 333 | + |
| 334 | + return devm_rtc_register_device(rtc); |
| 335 | +} |
| 336 | + |
| 337 | +static const struct of_device_id rx8111_of_match[] = { |
| 338 | + { |
| 339 | + .compatible = "epson,rx8111", |
| 340 | + }, |
| 341 | + {} |
| 342 | +}; |
| 343 | +MODULE_DEVICE_TABLE(of, rx8111_of_match); |
| 344 | + |
| 345 | +static struct i2c_driver rx8111_driver = { |
| 346 | + .driver = { |
| 347 | + .name = "rtc-rx8111", |
| 348 | + .of_match_table = rx8111_of_match, |
| 349 | + }, |
| 350 | + .probe = rx8111_probe, |
| 351 | +}; |
| 352 | +module_i2c_driver(rx8111_driver); |
| 353 | + |
| 354 | +MODULE_AUTHOR( "Waqar Hameed <[email protected]>"); |
| 355 | +MODULE_DESCRIPTION("Epson RX8111 RTC driver"); |
| 356 | +MODULE_LICENSE("GPL"); |
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