@@ -1840,83 +1840,96 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_fan_data[] = {
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.mask = GENMASK (7 , 0 ),
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.capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET ,
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.bit = BIT (0 ),
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+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET ,
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+
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},
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{
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.label = "tacho2" ,
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.reg = MLXPLAT_CPLD_LPC_REG_TACHO2_OFFSET ,
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.mask = GENMASK (7 , 0 ),
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.capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET ,
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.bit = BIT (1 ),
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+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET ,
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},
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{
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.label = "tacho3" ,
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.reg = MLXPLAT_CPLD_LPC_REG_TACHO3_OFFSET ,
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.mask = GENMASK (7 , 0 ),
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.capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET ,
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.bit = BIT (2 ),
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+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET ,
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},
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{
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.label = "tacho4" ,
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.reg = MLXPLAT_CPLD_LPC_REG_TACHO4_OFFSET ,
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.mask = GENMASK (7 , 0 ),
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.capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET ,
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.bit = BIT (3 ),
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+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET ,
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},
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{
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.label = "tacho5" ,
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.reg = MLXPLAT_CPLD_LPC_REG_TACHO5_OFFSET ,
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.mask = GENMASK (7 , 0 ),
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.capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET ,
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.bit = BIT (4 ),
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+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET ,
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},
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{
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.label = "tacho6" ,
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.reg = MLXPLAT_CPLD_LPC_REG_TACHO6_OFFSET ,
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.mask = GENMASK (7 , 0 ),
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.capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET ,
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.bit = BIT (5 ),
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+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET ,
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},
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{
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.label = "tacho7" ,
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.reg = MLXPLAT_CPLD_LPC_REG_TACHO7_OFFSET ,
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.mask = GENMASK (7 , 0 ),
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.capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET ,
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.bit = BIT (6 ),
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+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET ,
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},
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{
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.label = "tacho8" ,
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.reg = MLXPLAT_CPLD_LPC_REG_TACHO8_OFFSET ,
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.mask = GENMASK (7 , 0 ),
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.capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET ,
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.bit = BIT (7 ),
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+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET ,
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},
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{
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.label = "tacho9" ,
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.reg = MLXPLAT_CPLD_LPC_REG_TACHO9_OFFSET ,
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.mask = GENMASK (7 , 0 ),
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.capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET ,
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.bit = BIT (0 ),
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+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET ,
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},
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{
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.label = "tacho10" ,
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.reg = MLXPLAT_CPLD_LPC_REG_TACHO10_OFFSET ,
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.mask = GENMASK (7 , 0 ),
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.capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET ,
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.bit = BIT (1 ),
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+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET ,
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},
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{
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.label = "tacho11" ,
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.reg = MLXPLAT_CPLD_LPC_REG_TACHO11_OFFSET ,
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.mask = GENMASK (7 , 0 ),
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.capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET ,
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.bit = BIT (2 ),
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+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET ,
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},
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{
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.label = "tacho12" ,
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.reg = MLXPLAT_CPLD_LPC_REG_TACHO12_OFFSET ,
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.mask = GENMASK (7 , 0 ),
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.capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET ,
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.bit = BIT (3 ),
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+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET ,
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},
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{
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.label = "conf" ,
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