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23 | 23 | #define ARC_REG_ICCM_BUILD 0x78 /* ICCM size (common) */
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24 | 24 | #define ARC_REG_XY_MEM_BCR 0x79
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25 | 25 | #define ARC_REG_MAC_BCR 0x7a
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26 |
| -#define ARC_REG_MUL_BCR 0x7b |
| 26 | +#define ARC_REG_MPY_BCR 0x7b |
27 | 27 | #define ARC_REG_SWAP_BCR 0x7c
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28 | 28 | #define ARC_REG_NORM_BCR 0x7d
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29 | 29 | #define ARC_REG_MIXMAX_BCR 0x7e
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@@ -177,7 +177,7 @@ struct bcr_isa_arcv2 {
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177 | 177 | #endif
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178 | 178 | };
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179 | 179 |
|
180 |
| -struct bcr_uarch_build_arcv2 { |
| 180 | +struct bcr_uarch_build { |
181 | 181 | #ifdef CONFIG_CPU_BIG_ENDIAN
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182 | 182 | unsigned int pad:8, prod:8, maj:8, min:8;
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183 | 183 | #else
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@@ -355,35 +355,6 @@ struct bcr_generic {
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355 | 355 | #endif
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356 | 356 | };
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357 | 357 |
|
358 |
| -/* |
359 |
| - ******************************************************************* |
360 |
| - * Generic structures to hold build configuration used at runtime |
361 |
| - */ |
362 |
| - |
363 |
| -struct cpuinfo_arc_bpu { |
364 |
| - unsigned int ver, full, num_cache, num_pred, ret_stk; |
365 |
| -}; |
366 |
| - |
367 |
| -struct cpuinfo_arc_ccm { |
368 |
| - unsigned int base_addr, sz; |
369 |
| -}; |
370 |
| - |
371 |
| -struct cpuinfo_arc { |
372 |
| - struct cpuinfo_arc_bpu bpu; |
373 |
| - struct bcr_identity core; |
374 |
| - struct bcr_isa_arcv2 isa; |
375 |
| - const char *release, *name; |
376 |
| - unsigned int vec_base; |
377 |
| - struct cpuinfo_arc_ccm iccm, dccm; |
378 |
| - struct { |
379 |
| - unsigned int swap:1, norm:1, minmax:1, barrel:1, crc:1, swape:1, pad1:2, |
380 |
| - fpu_sp:1, fpu_dp:1, dual:1, dual_enb:1, pad2:4, |
381 |
| - ap_num:4, ap_full:1, smart:1, rtt:1, pad3:1, |
382 |
| - timer0:1, timer1:1, rtc:1, gfrc:1, pad4:4; |
383 |
| - } extn; |
384 |
| - struct bcr_mpy extn_mpy; |
385 |
| -}; |
386 |
| - |
387 | 358 | static inline int is_isa_arcv2(void)
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388 | 359 | {
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389 | 360 | return IS_ENABLED(CONFIG_ISA_ARCV2);
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