@@ -285,15 +285,18 @@ static int umsch_mm_v4_0_set_hw_resources(struct amdgpu_umsch_mm *umsch)
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memcpy (set_hw_resources .mmhub_base , adev -> reg_offset [MMHUB_HWIP ][0 ],
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sizeof (uint32_t ) * 5 );
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- set_hw_resources .mmhub_version = amdgpu_ip_version (adev , MMHUB_HWIP , 0 );
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+ set_hw_resources .mmhub_version =
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+ IP_VERSION_MAJ_MIN_REV (amdgpu_ip_version (adev , MMHUB_HWIP , 0 ));
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memcpy (set_hw_resources .osssys_base , adev -> reg_offset [OSSSYS_HWIP ][0 ],
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sizeof (uint32_t ) * 5 );
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set_hw_resources .osssys_version =
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- amdgpu_ip_version (adev , OSSSYS_HWIP , 0 );
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+ IP_VERSION_MAJ_MIN_REV ( amdgpu_ip_version (adev , OSSSYS_HWIP , 0 ) );
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- set_hw_resources .vcn_version = amdgpu_ip_version (adev , VCN_HWIP , 0 );
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- set_hw_resources .vpe_version = amdgpu_ip_version (adev , VPE_HWIP , 0 );
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+ set_hw_resources .vcn_version =
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+ IP_VERSION_MAJ_MIN_REV (amdgpu_ip_version (adev , VCN_HWIP , 0 ));
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+ set_hw_resources .vpe_version =
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+ IP_VERSION_MAJ_MIN_REV (amdgpu_ip_version (adev , VPE_HWIP , 0 ));
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set_hw_resources .api_status .api_completion_fence_addr = umsch -> ring .fence_drv .gpu_addr ;
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set_hw_resources .api_status .api_completion_fence_value = ++ umsch -> ring .fence_drv .sync_seq ;
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