@@ -310,47 +310,26 @@ const struct clk_ops ti_clk_divider_ops = {
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.restore_context = clk_divider_restore_context ,
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};
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- static struct clk * _register_divider (struct device * dev , const char * name ,
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- const char * parent_name ,
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- unsigned long flags ,
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- struct clk_omap_reg * reg ,
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- u8 shift , u8 width , s8 latch ,
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- u8 clk_divider_flags ,
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- const struct clk_div_table * table )
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+ static struct clk * _register_divider (struct device_node * node ,
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+ u32 flags ,
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+ struct clk_omap_divider * div )
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{
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- struct clk_omap_divider * div ;
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struct clk * clk ;
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struct clk_init_data init ;
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+ const char * parent_name ;
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- if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK ) {
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- if (width + shift > 16 ) {
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- pr_warn ("divider value exceeds LOWORD field\n" );
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- return ERR_PTR (- EINVAL );
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- }
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- }
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-
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- /* allocate the divider */
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- div = kzalloc (sizeof (* div ), GFP_KERNEL );
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- if (!div )
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- return ERR_PTR (- ENOMEM );
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+ parent_name = of_clk_get_parent_name (node , 0 );
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- init .name = name ;
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+ init .name = node -> name ;
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init .ops = & ti_clk_divider_ops ;
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init .flags = flags ;
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init .parent_names = (parent_name ? & parent_name : NULL );
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init .num_parents = (parent_name ? 1 : 0 );
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- /* struct clk_divider assignments */
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- memcpy (& div -> reg , reg , sizeof (* reg ));
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- div -> shift = shift ;
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- div -> width = width ;
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- div -> latch = latch ;
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- div -> flags = clk_divider_flags ;
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div -> hw .init = & init ;
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- div -> table = table ;
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/* register the clock */
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- clk = ti_clk_register (dev , & div -> hw , name );
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+ clk = ti_clk_register (NULL , & div -> hw , node -> name );
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if (IS_ERR (clk ))
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kfree (div );
@@ -425,8 +404,8 @@ int ti_clk_parse_divider_data(int *div_table, int num_dividers, int max_div,
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return 0 ;
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}
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- static struct clk_div_table *
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- __init ti_clk_get_div_table ( struct device_node * node )
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+ static int __init ti_clk_get_div_table ( struct device_node * node ,
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+ struct clk_omap_divider * div )
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{
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struct clk_div_table * table ;
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const __be32 * divspec ;
@@ -438,7 +417,7 @@ __init ti_clk_get_div_table(struct device_node *node)
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divspec = of_get_property (node , "ti,dividers" , & num_div );
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if (!divspec )
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- return NULL ;
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+ return 0 ;
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num_div /= 4 ;
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@@ -453,13 +432,12 @@ __init ti_clk_get_div_table(struct device_node *node)
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if (!valid_div ) {
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pr_err ("no valid dividers for %pOFn table\n" , node );
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- return ERR_PTR ( - EINVAL ) ;
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+ return - EINVAL ;
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}
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table = kcalloc (valid_div + 1 , sizeof (* table ), GFP_KERNEL );
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-
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if (!table )
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- return ERR_PTR ( - ENOMEM ) ;
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+ return - ENOMEM ;
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valid_div = 0 ;
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@@ -472,7 +450,9 @@ __init ti_clk_get_div_table(struct device_node *node)
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}
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}
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- return table ;
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+ div -> table = table ;
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+
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+ return 0 ;
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}
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static int _get_divider_width (struct device_node * node ,
@@ -520,46 +500,43 @@ static int _get_divider_width(struct device_node *node,
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}
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static int __init ti_clk_divider_populate (struct device_node * node ,
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- struct clk_omap_reg * reg , const struct clk_div_table * * table ,
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- u32 * flags , u8 * div_flags , u8 * width , u8 * shift , s8 * latch )
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+ struct clk_omap_divider * div ,
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+ u32 * flags )
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{
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u32 val ;
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int ret ;
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- ret = ti_clk_get_reg_addr (node , 0 , reg );
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+ ret = ti_clk_get_reg_addr (node , 0 , & div -> reg );
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if (ret )
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return ret ;
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if (!of_property_read_u32 (node , "ti,bit-shift" , & val ))
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- * shift = val ;
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+ div -> shift = val ;
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else
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- * shift = 0 ;
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+ div -> shift = 0 ;
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- if (latch ) {
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- if (!of_property_read_u32 (node , "ti,latch-bit" , & val ))
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- * latch = val ;
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- else
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- * latch = - EINVAL ;
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- }
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+ if (!of_property_read_u32 (node , "ti,latch-bit" , & val ))
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+ div -> latch = val ;
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+ else
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+ div -> latch = - EINVAL ;
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* flags = 0 ;
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- * div_flags = 0 ;
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+ div -> flags = 0 ;
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if (of_property_read_bool (node , "ti,index-starts-at-one" ))
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- * div_flags |= CLK_DIVIDER_ONE_BASED ;
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+ div -> flags |= CLK_DIVIDER_ONE_BASED ;
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if (of_property_read_bool (node , "ti,index-power-of-two" ))
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- * div_flags |= CLK_DIVIDER_POWER_OF_TWO ;
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+ div -> flags |= CLK_DIVIDER_POWER_OF_TWO ;
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if (of_property_read_bool (node , "ti,set-rate-parent" ))
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* flags |= CLK_SET_RATE_PARENT ;
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- * table = ti_clk_get_div_table (node );
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-
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- if (IS_ERR (* table ))
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- return PTR_ERR (* table );
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+ ret = ti_clk_get_div_table (node , div );
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+ if (ret )
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+ return ret ;
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- * width = _get_divider_width (node , * table , * div_flags );
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+ div -> width = _get_divider_width (node , div -> table , div -> flags );
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return 0 ;
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}
@@ -573,47 +550,39 @@ static int __init ti_clk_divider_populate(struct device_node *node,
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static void __init of_ti_divider_clk_setup (struct device_node * node )
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{
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struct clk * clk ;
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- const char * parent_name ;
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- struct clk_omap_reg reg ;
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- u8 clk_divider_flags = 0 ;
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- u8 width = 0 ;
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- u8 shift = 0 ;
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- s8 latch = - EINVAL ;
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- const struct clk_div_table * table = NULL ;
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u32 flags = 0 ;
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+ struct clk_omap_divider * div ;
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- parent_name = of_clk_get_parent_name (node , 0 );
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+ div = kzalloc (sizeof (* div ), GFP_KERNEL );
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+ if (!div )
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+ return ;
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- if (ti_clk_divider_populate (node , & reg , & table , & flags ,
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- & clk_divider_flags , & width , & shift , & latch ))
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+ if (ti_clk_divider_populate (node , div , & flags ))
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goto cleanup ;
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- clk = _register_divider (NULL , node -> name , parent_name , flags , & reg ,
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- shift , width , latch , clk_divider_flags , table );
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-
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+ clk = _register_divider (node , flags , div );
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if (!IS_ERR (clk )) {
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of_clk_add_provider (node , of_clk_src_simple_get , clk );
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of_ti_clk_autoidle_setup (node );
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return ;
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}
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cleanup :
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- kfree (table );
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+ kfree (div -> table );
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+ kfree (div );
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}
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CLK_OF_DECLARE (divider_clk , "ti,divider-clock" , of_ti_divider_clk_setup );
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static void __init of_ti_composite_divider_clk_setup (struct device_node * node )
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{
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struct clk_omap_divider * div ;
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- u32 val ;
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+ u32 tmp ;
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div = kzalloc (sizeof (* div ), GFP_KERNEL );
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if (!div )
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return ;
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- if (ti_clk_divider_populate (node , & div -> reg , & div -> table , & val ,
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- & div -> flags , & div -> width , & div -> shift ,
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- NULL ) < 0 )
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+ if (ti_clk_divider_populate (node , div , & tmp ))
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goto cleanup ;
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if (!ti_clk_add_component (node , & div -> hw , CLK_COMPONENT_TYPE_DIVIDER ))
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