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* Copyright (c) 2017 Pengutronix, Oleksij Rempel <[email protected] >
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*/
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+ #include <dt-bindings/firmware/imx/rsrc.h>
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#include <linux/arm-smccc.h>
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#include <linux/clk.h>
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#include <linux/err.h>
@@ -75,10 +76,13 @@ struct imx_rproc_mem {
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size_t size ;
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};
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- /* att flags */
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+ /* att flags: lower 16 bits specifying core, higher 16 bits for flags */
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/* M4 own area. Can be mapped at probe */
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- #define ATT_OWN BIT(1)
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- #define ATT_IOMEM BIT(2)
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+ #define ATT_OWN BIT(31)
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+ #define ATT_IOMEM BIT(30)
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+
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+ #define ATT_CORE_MASK 0xffff
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+ #define ATT_CORE (I ) BIT((I))
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static int imx_rproc_detach_pd (struct rproc * rproc );
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@@ -101,6 +105,7 @@ struct imx_rproc {
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u32 rsrc_id ; /* resource id */
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u32 entry ; /* cpu start address */
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int num_pd ;
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+ u32 core_index ;
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struct device * * pd_dev ;
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struct device_link * * pd_dev_link ;
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};
@@ -131,6 +136,19 @@ static const struct imx_rproc_att imx_rproc_att_imx93[] = {
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{ 0xD0000000 , 0xa0000000 , 0x10000000 , 0 },
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};
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+ static const struct imx_rproc_att imx_rproc_att_imx8qm [] = {
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+ /* dev addr , sys addr , size , flags */
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+ { 0x08000000 , 0x08000000 , 0x10000000 , 0 },
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+ /* TCML */
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+ { 0x1FFE0000 , 0x34FE0000 , 0x00020000 , ATT_OWN | ATT_IOMEM | ATT_CORE (0 )},
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+ { 0x1FFE0000 , 0x38FE0000 , 0x00020000 , ATT_OWN | ATT_IOMEM | ATT_CORE (1 )},
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+ /* TCMU */
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+ { 0x20000000 , 0x35000000 , 0x00020000 , ATT_OWN | ATT_IOMEM | ATT_CORE (0 )},
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+ { 0x20000000 , 0x39000000 , 0x00020000 , ATT_OWN | ATT_IOMEM | ATT_CORE (1 )},
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+ /* DDR (Data) */
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+ { 0x80000000 , 0x80000000 , 0x60000000 , 0 },
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+ };
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+
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static const struct imx_rproc_att imx_rproc_att_imx8qxp [] = {
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{ 0x08000000 , 0x08000000 , 0x10000000 , 0 },
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/* TCML/U */
@@ -281,6 +299,12 @@ static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = {
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.method = IMX_RPROC_MMIO ,
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};
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+ static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qm = {
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+ .att = imx_rproc_att_imx8qm ,
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+ .att_size = ARRAY_SIZE (imx_rproc_att_imx8qm ),
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+ .method = IMX_RPROC_SCU_API ,
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+ };
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+
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static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qxp = {
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.att = imx_rproc_att_imx8qxp ,
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.att_size = ARRAY_SIZE (imx_rproc_att_imx8qxp ),
@@ -397,6 +421,17 @@ static int imx_rproc_da_to_sys(struct imx_rproc *priv, u64 da,
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for (i = 0 ; i < dcfg -> att_size ; i ++ ) {
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const struct imx_rproc_att * att = & dcfg -> att [i ];
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+ /*
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+ * Ignore entries not belong to current core:
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+ * i.MX8QM has dual general M4_[0,1] cores, M4_0's own entries
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+ * has "ATT_CORE(0) & BIT(0)" true, M4_1's own entries has
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+ * "ATT_CORE(1) & BIT(1)" true.
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+ */
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+ if (att -> flags & ATT_CORE_MASK ) {
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+ if (!((BIT (priv -> core_index )) & (att -> flags & ATT_CORE_MASK )))
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+ continue ;
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+ }
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+
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if (da >= att -> da && da + len < att -> da + att -> size ) {
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unsigned int offset = da - att -> da ;
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@@ -852,6 +887,11 @@ static int imx_rproc_detect_mode(struct imx_rproc *priv)
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return ret ;
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}
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+ if (priv -> rsrc_id == IMX_SC_R_M4_1_PID0 )
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+ priv -> core_index = 1 ;
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+ else
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+ priv -> core_index = 0 ;
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+
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/*
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* If Mcore resource is not owned by Acore partition, It is kicked by ROM,
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* and Linux could only do IPC with Mcore and nothing else.
@@ -1048,6 +1088,7 @@ static const struct of_device_id imx_rproc_of_match[] = {
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{ .compatible = "fsl,imx8mn-cm7" , .data = & imx_rproc_cfg_imx8mn },
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{ .compatible = "fsl,imx8mp-cm7" , .data = & imx_rproc_cfg_imx8mn },
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{ .compatible = "fsl,imx8qxp-cm4" , .data = & imx_rproc_cfg_imx8qxp },
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+ { .compatible = "fsl,imx8qm-cm4" , .data = & imx_rproc_cfg_imx8qm },
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{ .compatible = "fsl,imx8ulp-cm33" , .data = & imx_rproc_cfg_imx8ulp },
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{ .compatible = "fsl,imx93-cm33" , .data = & imx_rproc_cfg_imx93 },
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{},
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