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geertuglaubitz
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sh: cache: Move forward declarations to <asm/cacheflush.h>
arch/sh/kernel/cpu/init.c:99:29: warning: no previous prototype for 'l2_cache_init' [-Wmissing-prototypes] arch/sh/kernel/cpu/sh4a/setup-sh7723.c:422:6: warning: no previous prototype for 'l2_cache_init' [-Wmissing-prototypes] arch/sh/kernel/cpu/sh4a/setup-sh7724.c:842:6: warning: no previous prototype for 'l2_cache_init' [-Wmissing-prototypes] arch/sh/mm/cache-j2.c:48:13: warning: no previous prototype for 'j2_cache_init' [-Wmissing-prototypes] arch/sh/mm/cache-sh2.c:85:13: warning: no previous prototype for 'sh2_cache_init' [-Wmissing-prototypes] arch/sh/mm/cache-sh2a.c:181:13: warning: no previous prototype for 'sh2a_cache_init' [-Wmissing-prototypes] arch/sh/mm/cache-sh3.c:90:13: warning: no previous prototype for 'sh3_cache_init' [-Wmissing-prototypes] arch/sh/mm/cache-sh4.c:384:13: warning: no previous prototype for 'sh4_cache_init' [-Wmissing-prototypes] arch/sh/mm/cache-shx3.c:18:13: warning: no previous prototype for 'shx3_cache_init' [-Wmissing-prototypes] arch/sh/mm/flush-sh4.c:106:13: warning: no previous prototype for 'sh4__flush_region_init' [-Wmissing-prototypes] arch/sh/mm/cache-sh7705.c:190:13: warning: no previous prototype for 'sh7705_cache_init' [-Wmissing-prototypes] Fix this by moving all cache-related forward declarations to <asm/cacheflush.h>, and by including the latter where needed. Signed-off-by: Geert Uytterhoeven <[email protected]> Reviewed-by: John Paul Adrian Glaubitz <[email protected]> Link: https://lore.kernel.org/r/f47ab87636d16db4c47bebe1bf62650045f61989.1709579038.git.geert+renesas@glider.be Signed-off-by: John Paul Adrian Glaubitz <[email protected]>
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+17
-16
lines changed

6 files changed

+17
-16
lines changed

arch/sh/include/asm/cacheflush.h

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -104,6 +104,18 @@ void kunmap_coherent(void *kvaddr);
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105105
void cpu_cache_init(void);
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107+
void __weak l2_cache_init(void);
108+
109+
void __weak j2_cache_init(void);
110+
void __weak sh2_cache_init(void);
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void __weak sh2a_cache_init(void);
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void __weak sh3_cache_init(void);
113+
void __weak shx3_cache_init(void);
114+
void __weak sh4_cache_init(void);
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void __weak sh7705_cache_init(void);
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117+
void __weak sh4__flush_region_init(void);
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107119
static inline void *sh_cacheop_vaddr(void *vaddr)
108120
{
109121
if (__in_29bit_mode())

arch/sh/kernel/cpu/sh4a/setup-sh7723.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,9 +14,12 @@
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#include <linux/sh_timer.h>
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#include <linux/sh_intc.h>
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#include <linux/io.h>
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18+
#include <asm/cacheflush.h>
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#include <asm/clock.h>
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#include <asm/mmzone.h>
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#include <asm/platform_early.h>
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2023
#include <cpu/sh7723.h>
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/* Serial */

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

Lines changed: 1 addition & 0 deletions
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@@ -21,6 +21,7 @@
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#include <linux/io.h>
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#include <linux/notifier.h>
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24+
#include <asm/cacheflush.h>
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#include <asm/suspend.h>
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#include <asm/clock.h>
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#include <asm/mmzone.h>

arch/sh/mm/cache-sh4.c

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -376,8 +376,6 @@ static void __flush_cache_one(unsigned long addr, unsigned long phys,
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} while (--way_count != 0);
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}
378378

379-
extern void __weak sh4__flush_region_init(void);
380-
381379
/*
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* SH-4 has virtually indexed and physically tagged cache.
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*/

arch/sh/mm/cache-shx3.c

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Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <asm/cache.h>
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#include <asm/cacheflush.h>
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#define CCR_CACHE_SNM 0x40000 /* Hardware-assisted synonym avoidance */
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#define CCR_CACHE_IBE 0x1000000 /* ICBI broadcast */

arch/sh/mm/cache.c

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Original file line numberDiff line numberDiff line change
@@ -320,45 +320,31 @@ void __init cpu_cache_init(void)
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goto skip;
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322322
if (boot_cpu_data.type == CPU_J2) {
323-
extern void __weak j2_cache_init(void);
324-
325323
j2_cache_init();
326324
} else if (boot_cpu_data.family == CPU_FAMILY_SH2) {
327-
extern void __weak sh2_cache_init(void);
328-
329325
sh2_cache_init();
330326
}
331327

332328
if (boot_cpu_data.family == CPU_FAMILY_SH2A) {
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extern void __weak sh2a_cache_init(void);
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sh2a_cache_init();
336330
}
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338332
if (boot_cpu_data.family == CPU_FAMILY_SH3) {
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extern void __weak sh3_cache_init(void);
340-
341333
sh3_cache_init();
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343335
if ((boot_cpu_data.type == CPU_SH7705) &&
344336
(boot_cpu_data.dcache.sets == 512)) {
345-
extern void __weak sh7705_cache_init(void);
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347337
sh7705_cache_init();
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}
349339
}
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351341
if ((boot_cpu_data.family == CPU_FAMILY_SH4) ||
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(boot_cpu_data.family == CPU_FAMILY_SH4A) ||
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(boot_cpu_data.family == CPU_FAMILY_SH4AL_DSP)) {
354-
extern void __weak sh4_cache_init(void);
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356344
sh4_cache_init();
357345

358346
if ((boot_cpu_data.type == CPU_SH7786) ||
359347
(boot_cpu_data.type == CPU_SHX3)) {
360-
extern void __weak shx3_cache_init(void);
361-
362348
shx3_cache_init();
363349
}
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}

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