Skip to content

Commit fd7a9d8

Browse files
committed
drm/i915: Fix g4x fbc watermark enable
'level' here means the highest level we can't use, so when checking the fbc watermarks we need a -1 to get at the last enabled level. While at if refactor the code a bit to declutter g4x_compute_pipe_wm(). Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: José Roberto de Souza <[email protected]>
1 parent fc62009 commit fd7a9d8

File tree

1 file changed

+21
-12
lines changed

1 file changed

+21
-12
lines changed

drivers/gpu/drm/i915/intel_pm.c

Lines changed: 21 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1345,6 +1345,23 @@ static void g4x_invalidate_wms(struct intel_crtc *crtc,
13451345
}
13461346
}
13471347

1348+
static bool g4x_compute_fbc_en(const struct g4x_wm_state *wm_state,
1349+
int level)
1350+
{
1351+
if (level < G4X_WM_LEVEL_SR)
1352+
return false;
1353+
1354+
if (level >= G4X_WM_LEVEL_SR &&
1355+
wm_state->sr.fbc > g4x_fbc_fifo_size(G4X_WM_LEVEL_SR))
1356+
return false;
1357+
1358+
if (level >= G4X_WM_LEVEL_HPLL &&
1359+
wm_state->hpll.fbc > g4x_fbc_fifo_size(G4X_WM_LEVEL_HPLL))
1360+
return false;
1361+
1362+
return true;
1363+
}
1364+
13481365
static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
13491366
{
13501367
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -1384,7 +1401,6 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
13841401
wm_state->wm.plane[plane_id] = raw->plane[plane_id];
13851402

13861403
level = G4X_WM_LEVEL_SR;
1387-
13881404
if (!g4x_raw_crtc_wm_is_valid(crtc_state, level))
13891405
goto out;
13901406

@@ -1396,7 +1412,6 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
13961412
wm_state->cxsr = num_active_planes == BIT(PLANE_PRIMARY);
13971413

13981414
level = G4X_WM_LEVEL_HPLL;
1399-
14001415
if (!g4x_raw_crtc_wm_is_valid(crtc_state, level))
14011416
goto out;
14021417

@@ -1419,17 +1434,11 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
14191434
/*
14201435
* Determine if the FBC watermark(s) can be used. IF
14211436
* this isn't the case we prefer to disable the FBC
1422-
( watermark(s) rather than disable the SR/HPLL
1423-
* level(s) entirely.
1437+
* watermark(s) rather than disable the SR/HPLL
1438+
* level(s) entirely. 'level-1' is the highest valid
1439+
* level here.
14241440
*/
1425-
wm_state->fbc_en = level > G4X_WM_LEVEL_NORMAL;
1426-
1427-
if (level >= G4X_WM_LEVEL_SR &&
1428-
wm_state->sr.fbc > g4x_fbc_fifo_size(G4X_WM_LEVEL_SR))
1429-
wm_state->fbc_en = false;
1430-
else if (level >= G4X_WM_LEVEL_HPLL &&
1431-
wm_state->hpll.fbc > g4x_fbc_fifo_size(G4X_WM_LEVEL_HPLL))
1432-
wm_state->fbc_en = false;
1441+
wm_state->fbc_en = g4x_compute_fbc_en(wm_state, level - 1);
14331442

14341443
return 0;
14351444
}

0 commit comments

Comments
 (0)