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271 | 271 | #define BCM5482_SSD_SGMII_SLAVE_EN 0x0002 /* Slave mode enable */
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272 | 272 | #define BCM5482_SSD_SGMII_SLAVE_AD 0x0001 /* Slave auto-detection */
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273 | 273 |
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| 274 | +/* BroadR-Reach LRE Registers. */ |
| 275 | +#define MII_BCM54XX_LRECR 0x00 /* LRE Control Register */ |
| 276 | +#define MII_BCM54XX_LRESR 0x01 /* LRE Status Register */ |
| 277 | +#define MII_BCM54XX_LREPHYSID1 0x02 /* LRE PHYS ID 1 */ |
| 278 | +#define MII_BCM54XX_LREPHYSID2 0x03 /* LRE PHYS ID 2 */ |
| 279 | +#define MII_BCM54XX_LREANAA 0x04 /* LDS Auto-Negotiation Advertised Ability */ |
| 280 | +#define MII_BCM54XX_LREANAC 0x05 /* LDS Auto-Negotiation Advertised Control */ |
| 281 | +#define MII_BCM54XX_LREANPT 0x06 /* LDS Ability Next Page Transmit */ |
| 282 | +#define MII_BCM54XX_LRELPA 0x07 /* LDS Link Partner Ability */ |
| 283 | +#define MII_BCM54XX_LRELPNPM 0x08 /* LDS Link Partner Next Page Message */ |
| 284 | +#define MII_BCM54XX_LRELPNPC 0x09 /* LDS Link Partner Next Page Control */ |
| 285 | +#define MII_BCM54XX_LRELDSE 0x0a /* LDS Expansion Register */ |
| 286 | +#define MII_BCM54XX_LREES 0x0f /* LRE Extended Status */ |
| 287 | + |
| 288 | +/* LRE control register. */ |
| 289 | +#define LRECR_RESET 0x8000 /* Reset to default state */ |
| 290 | +#define LRECR_LOOPBACK 0x4000 /* Internal Loopback */ |
| 291 | +#define LRECR_LDSRES 0x2000 /* Restart LDS Process */ |
| 292 | +#define LRECR_LDSEN 0x1000 /* LDS Enable */ |
| 293 | +#define LRECR_PDOWN 0x0800 /* Enable low power state */ |
| 294 | +#define LRECR_ISOLATE 0x0400 /* Isolate data paths from MII */ |
| 295 | +#define LRECR_SPEED100 0x0200 /* Select 100 Mbps */ |
| 296 | +#define LRECR_SPEED10 0x0000 /* Select 10 Mbps */ |
| 297 | +#define LRECR_4PAIRS 0x0020 /* Select 4 Pairs */ |
| 298 | +#define LRECR_2PAIRS 0x0010 /* Select 2 Pairs */ |
| 299 | +#define LRECR_1PAIR 0x0000 /* Select 1 Pair */ |
| 300 | +#define LRECR_MASTER 0x0008 /* Force Master when LDS disabled */ |
| 301 | +#define LRECR_SLAVE 0x0000 /* Force Slave when LDS disabled */ |
| 302 | + |
| 303 | +/* LRE status register. */ |
| 304 | +#define LRESR_100_1PAIR 0x2000 /* Can do 100Mbps 1 Pair */ |
| 305 | +#define LRESR_100_4PAIR 0x1000 /* Can do 100Mbps 4 Pairs */ |
| 306 | +#define LRESR_100_2PAIR 0x0800 /* Can do 100Mbps 2 Pairs */ |
| 307 | +#define LRESR_10_2PAIR 0x0400 /* Can do 10Mbps 2 Pairs */ |
| 308 | +#define LRESR_10_1PAIR 0x0200 /* Can do 10Mbps 1 Pair */ |
| 309 | +#define LRESR_ESTATEN 0x0100 /* Extended Status in R15 */ |
| 310 | +#define LRESR_RESV 0x0080 /* Unused... */ |
| 311 | +#define LRESR_MFPS 0x0040 /* Can suppress Management Frames Preamble */ |
| 312 | +#define LRESR_LDSCOMPLETE 0x0020 /* LDS Auto-negotiation complete */ |
| 313 | +#define LRESR_8023 0x0010 /* Has IEEE 802.3 Support */ |
| 314 | +#define LRESR_LDSABILITY 0x0008 /* LDS auto-negotiation capable */ |
| 315 | +#define LRESR_LSTATUS 0x0004 /* Link status */ |
| 316 | +#define LRESR_JCD 0x0002 /* Jabber detected */ |
| 317 | +#define LRESR_ERCAP 0x0001 /* Ext-reg capability */ |
| 318 | + |
| 319 | +/* LDS Auto-Negotiation Advertised Ability. */ |
| 320 | +#define LREANAA_PAUSE_ASYM 0x8000 /* Can pause asymmetrically */ |
| 321 | +#define LREANAA_PAUSE 0x4000 /* Can pause */ |
| 322 | +#define LREANAA_100_1PAIR 0x0020 /* Can do 100Mbps 1 Pair */ |
| 323 | +#define LREANAA_100_4PAIR 0x0010 /* Can do 100Mbps 4 Pair */ |
| 324 | +#define LREANAA_100_2PAIR 0x0008 /* Can do 100Mbps 2 Pair */ |
| 325 | +#define LREANAA_10_2PAIR 0x0004 /* Can do 10Mbps 2 Pair */ |
| 326 | +#define LREANAA_10_1PAIR 0x0002 /* Can do 10Mbps 1 Pair */ |
| 327 | + |
| 328 | +#define LRE_ADVERTISE_FULL (LREANAA_100_1PAIR | LREANAA_100_4PAIR | \ |
| 329 | + LREANAA_100_2PAIR | LREANAA_10_2PAIR | \ |
| 330 | + LREANAA_10_1PAIR) |
| 331 | + |
| 332 | +#define LRE_ADVERTISE_ALL LRE_ADVERTISE_FULL |
| 333 | + |
| 334 | +/* LDS Link Partner Ability. */ |
| 335 | +#define LRELPA_PAUSE_ASYM 0x8000 /* Supports asymmetric pause */ |
| 336 | +#define LRELPA_PAUSE 0x4000 /* Supports pause capability */ |
| 337 | +#define LRELPA_100_1PAIR 0x0020 /* 100Mbps 1 Pair capable */ |
| 338 | +#define LRELPA_100_4PAIR 0x0010 /* 100Mbps 4 Pair capable */ |
| 339 | +#define LRELPA_100_2PAIR 0x0008 /* 100Mbps 2 Pair capable */ |
| 340 | +#define LRELPA_10_2PAIR 0x0004 /* 10Mbps 2 Pair capable */ |
| 341 | +#define LRELPA_10_1PAIR 0x0002 /* 10Mbps 1 Pair capable */ |
| 342 | + |
| 343 | +/* LDS Expansion register. */ |
| 344 | +#define LDSE_DOWNGRADE 0x8000 /* Can do LDS Speed Downgrade */ |
| 345 | +#define LDSE_MASTER 0x4000 /* Master / Slave */ |
| 346 | +#define LDSE_PAIRS_MASK 0x3000 /* Pair Count Mask */ |
| 347 | +#define LDSE_PAIRS_SHIFT 12 |
| 348 | +#define LDSE_4PAIRS (2 << LDSE_PAIRS_SHIFT) /* 4 Pairs Connection */ |
| 349 | +#define LDSE_2PAIRS (1 << LDSE_PAIRS_SHIFT) /* 2 Pairs Connection */ |
| 350 | +#define LDSE_1PAIR (0 << LDSE_PAIRS_SHIFT) /* 1 Pair Connection */ |
| 351 | +#define LDSE_CABLEN_MASK 0x0FFF /* Cable Length Mask */ |
| 352 | + |
274 | 353 | /* BCM54810 Registers */
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275 | 354 | #define BCM54810_EXP_BROADREACH_LRE_MISC_CTL (MII_BCM54XX_EXP_SEL_ER + 0x90)
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276 | 355 | #define BCM54810_EXP_BROADREACH_LRE_MISC_CTL_EN (1 << 0)
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277 | 356 | #define BCM54810_SHD_CLK_CTL 0x3
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278 | 357 | #define BCM54810_SHD_CLK_CTL_GTXCLK_EN (1 << 9)
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279 | 358 |
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| 359 | +/* BCM54811 Registers */ |
| 360 | +#define BCM54811_EXP_BROADREACH_LRE_OVERLAY_CTL (MII_BCM54XX_EXP_SEL_ER + 0x9A) |
| 361 | +/* Access Control Override Enable */ |
| 362 | +#define BCM54811_EXP_BROADREACH_LRE_OVERLAY_CTL_EN BIT(15) |
| 363 | +/* Access Control Override Value */ |
| 364 | +#define BCM54811_EXP_BROADREACH_LRE_OVERLAY_CTL_OVERRIDE_VAL BIT(14) |
| 365 | +/* Access Control Value */ |
| 366 | +#define BCM54811_EXP_BROADREACH_LRE_OVERLAY_CTL_VAL BIT(13) |
| 367 | + |
280 | 368 | /* BCM54612E Registers */
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281 | 369 | #define BCM54612E_EXP_SPARE0 (MII_BCM54XX_EXP_SEL_ETC + 0x34)
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282 | 370 | #define BCM54612E_LED4_CLK125OUT_EN (1 << 1)
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