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dbriemannTheRealMDoerr
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8370579: PPC: fix inswri immediate argument order
Backport-of: 9625993
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src/hotspot/cpu/ppc/ppc.ad

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -12583,27 +12583,27 @@ instruct countTrailingZerosL_cnttzd(iRegIdst dst, iRegLsrc src) %{
1258312583
%}
1258412584

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// Expand nodes for byte_reverse_int.
12586-
instruct insrwi_a(iRegIdst dst, iRegIsrc src, immI16 pos, immI16 shift) %{
12587-
effect(DEF dst, USE src, USE pos, USE shift);
12586+
instruct insrwi_a(iRegIdst dst, iRegIsrc src, immI16 n, immI16 b) %{
12587+
effect(DEF dst, USE src, USE n, USE b);
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predicate(false);
1258912589

12590-
format %{ "INSRWI $dst, $src, $pos, $shift" %}
12590+
format %{ "INSRWI $dst, $src, $n, $b" %}
1259112591
size(4);
1259212592
ins_encode %{
12593-
__ insrwi($dst$$Register, $src$$Register, $shift$$constant, $pos$$constant);
12593+
__ insrwi($dst$$Register, $src$$Register, $n$$constant, $b$$constant);
1259412594
%}
1259512595
ins_pipe(pipe_class_default);
1259612596
%}
1259712597

1259812598
// As insrwi_a, but with USE_DEF.
12599-
instruct insrwi(iRegIdst dst, iRegIsrc src, immI16 pos, immI16 shift) %{
12600-
effect(USE_DEF dst, USE src, USE pos, USE shift);
12599+
instruct insrwi(iRegIdst dst, iRegIsrc src, immI16 n, immI16 b) %{
12600+
effect(USE_DEF dst, USE src, USE n, USE b);
1260112601
predicate(false);
1260212602

12603-
format %{ "INSRWI $dst, $src, $pos, $shift" %}
12603+
format %{ "INSRWI $dst, $src, $n, $b" %}
1260412604
size(4);
1260512605
ins_encode %{
12606-
__ insrwi($dst$$Register, $src$$Register, $shift$$constant, $pos$$constant);
12606+
__ insrwi($dst$$Register, $src$$Register, $n$$constant, $b$$constant);
1260712607
%}
1260812608
ins_pipe(pipe_class_default);
1260912609
%}
@@ -12625,12 +12625,12 @@ instruct bytes_reverse_int_Ex(iRegIdst dst, iRegIsrc src) %{
1262512625
iRegLdst tmpI3;
1262612626

1262712627
urShiftI_reg_imm(tmpI1, src, imm24);
12628-
insrwi_a(dst, tmpI1, imm24, imm8);
12628+
insrwi_a(dst, tmpI1, imm8, imm24);
1262912629
urShiftI_reg_imm(tmpI2, src, imm16);
12630-
insrwi(dst, tmpI2, imm8, imm16);
12630+
insrwi(dst, tmpI2, imm16, imm8);
1263112631
urShiftI_reg_imm(tmpI3, src, imm8);
1263212632
insrwi(dst, tmpI3, imm8, imm8);
12633-
insrwi(dst, src, imm0, imm8);
12633+
insrwi(dst, src, imm8, imm0);
1263412634
%}
1263512635
%}
1263612636

@@ -12748,7 +12748,7 @@ instruct bytes_reverse_ushort_Ex(iRegIdst dst, iRegIsrc src) %{
1274812748
immI16 imm8 %{ (int) 8 %}
1274912749

1275012750
urShiftI_reg_imm(dst, src, imm8);
12751-
insrwi(dst, src, imm16, imm8);
12751+
insrwi(dst, src, imm8, imm16);
1275212752
%}
1275312753
%}
1275412754

@@ -12777,7 +12777,7 @@ instruct bytes_reverse_short_Ex(iRegIdst dst, iRegIsrc src) %{
1277712777
iRegLdst tmpI1;
1277812778

1277912779
urShiftI_reg_imm(tmpI1, src, imm8);
12780-
insrwi(tmpI1, src, imm16, imm8);
12780+
insrwi(tmpI1, src, imm8, imm16);
1278112781
extsh(dst, tmpI1);
1278212782
%}
1278312783
%}

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