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ADESTMguilemop-ext
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dmaengine: stm32-mdma: use Link Address Register to compute residue
Current implementation relies on curr_hwdesc index. But to keep this index up to date, Block Transfer interrupt (BTIE) has to be enabled. If it is not, curr_hwdesc is not updated, and then residue is not reliable. Rely on Link Address Register instead. And disable BTIE interrupt in stm32_mdma_setup_xfer() because it is no more needed in case of _prep_slave_sg() to maintain curr_hwdesc up to date. Change-Id: I515f6d10d14ef4d3f5432b197e0ea0eb76fc7da7 Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/linux-stm32/+/320986 Tested-by: Alain VOLMAT <alain.volmat@foss.st.com> ACI: CITOOLS <MDG-smet-aci-reviews@list.st.com> ACI: CIBUILD <MDG-smet-aci-builds@list.st.com> Reviewed-by: Alain VOLMAT <alain.volmat@foss.st.com>
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drivers/dma/stm32-mdma.c

Lines changed: 9 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -778,8 +778,6 @@ static int stm32_mdma_setup_xfer(struct stm32_mdma_chan *chan,
778778
/* Enable interrupts */
779779
ccr &= ~STM32_MDMA_CCR_IRQ_MASK;
780780
ccr |= STM32_MDMA_CCR_TEIE | STM32_MDMA_CCR_CTCIE;
781-
if (sg_len > 1)
782-
ccr |= STM32_MDMA_CCR_BTIE;
783781
desc->ccr = ccr;
784782

785783
return 0;
@@ -1326,20 +1324,21 @@ static size_t stm32_mdma_desc_residue(struct stm32_mdma_chan *chan,
13261324
{
13271325
struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan);
13281326
struct stm32_mdma_hwdesc *hwdesc;
1329-
u32 cisr, cbndtr, residue, modulo, burst_size;
1327+
u32 cisr, clar, cbndtr, residue, modulo, burst_size;
13301328
int i;
13311329

13321330
cisr = stm32_mdma_read(dmadev, STM32_MDMA_CISR(chan->id));
1333-
/* Check if Block Transfer Complete is pending, curr_hwdesc not yet updated */
1334-
if (cisr & STM32_MDMA_CISR_BTIF) {
1335-
curr_hwdesc++;
1336-
if(desc->cyclic && curr_hwdesc == desc->count)
1337-
curr_hwdesc = 0;
1338-
}
13391331

13401332
residue = 0;
1341-
for (i = curr_hwdesc + 1; i < desc->count; i++) {
1333+
/* Get the next hw descriptor to process from current transfer */
1334+
clar = stm32_mdma_read(dmadev, STM32_MDMA_CLAR(chan->id));
1335+
for (i = desc->count - 1; i >= 0; i--) {
13421336
hwdesc = desc->node[i].hwdesc;
1337+
1338+
if (hwdesc->clar == clar)
1339+
break;/* Current transfer found, stop cumulating */
1340+
1341+
/* Cumulate residue of unprocessed hw descriptors */
13431342
residue += STM32_MDMA_CBNDTR_BNDT(hwdesc->cbndtr);
13441343
}
13451344
cbndtr = stm32_mdma_read(dmadev, STM32_MDMA_CBNDTR(chan->id));

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