233233#define FDCAN_MESSAGE_RAM_SIZE 0x2800U
234234#define FDCAN_MESSAGE_RAM_END_ADDRESS (SRAMCAN_BASE + FDCAN_MESSAGE_RAM_SIZE - 0x4U) /* Message RAM width is 4 Bytes */
235235
236+ #define SRAMCAN_FLS_NBR (128U) /* Max. Filter List Standard Number */
237+ #define SRAMCAN_FLE_NBR (64U) /* Max. Filter List Extended Number */
238+ #define SRAMCAN_RF0_NBR (64U) /* RX FIFO 0 Elements Number */
239+ #define SRAMCAN_RF1_NBR (64U) /* RX FIFO 1 Elements Number */
240+ #define SRAMCAN_RB_NBR (64U) /* RX Buffers Number */
241+ #define SRAMCAN_TEF_NBR (32U) /* TX Event FIFO Elements Number */
242+ #define SRAMCAN_TFQ_NBR (32U) /* TX FIFO/Queue Elements Number */
243+
236244/**
237245 * @}
238246 */
@@ -251,7 +259,7 @@ static const uint8_t DLCtoBytes[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 12, 16, 20, 24,
251259/** @addtogroup FDCAN_Private_Functions_Prototypes
252260 * @{
253261 */
254- static HAL_StatusTypeDef FDCAN_CalcultateRamBlockAddresses (FDCAN_HandleTypeDef * hfdcan );
262+ static HAL_StatusTypeDef FDCAN_CalculateRamBlockAddresses (FDCAN_HandleTypeDef * hfdcan );
255263static void FDCAN_CopyMessageToRAM (const FDCAN_HandleTypeDef * hfdcan , const FDCAN_TxHeaderTypeDef * pTxHeader ,
256264 const uint8_t * pTxData , uint32_t BufferIndex );
257265/**
@@ -301,14 +309,12 @@ HAL_StatusTypeDef HAL_FDCAN_Init(FDCAN_HandleTypeDef *hfdcan)
301309 return HAL_ERROR ;
302310 }
303311
304- /* Check FDCAN instance */
312+ /* Check function parameters */
313+ assert_param (IS_FDCAN_ALL_INSTANCE (hfdcan -> Instance ));
305314 if (hfdcan -> Instance == FDCAN1 )
306315 {
307316 hfdcan -> ttcan = (TTCAN_TypeDef * )((uint32_t )hfdcan -> Instance + 0x100U );
308317 }
309-
310- /* Check function parameters */
311- assert_param (IS_FDCAN_ALL_INSTANCE (hfdcan -> Instance ));
312318 assert_param (IS_FDCAN_FRAME_FORMAT (hfdcan -> Init .FrameFormat ));
313319 assert_param (IS_FDCAN_MODE (hfdcan -> Init .Mode ));
314320 assert_param (IS_FUNCTIONAL_STATE (hfdcan -> Init .AutoRetransmission ));
@@ -325,25 +331,25 @@ HAL_StatusTypeDef HAL_FDCAN_Init(FDCAN_HandleTypeDef *hfdcan)
325331 assert_param (IS_FDCAN_DATA_TSEG1 (hfdcan -> Init .DataTimeSeg1 ));
326332 assert_param (IS_FDCAN_DATA_TSEG2 (hfdcan -> Init .DataTimeSeg2 ));
327333 }
328- assert_param (IS_FDCAN_MAX_VALUE (hfdcan -> Init .StdFiltersNbr , 128U ));
329- assert_param (IS_FDCAN_MAX_VALUE (hfdcan -> Init .ExtFiltersNbr , 64U ));
330- assert_param (IS_FDCAN_MAX_VALUE (hfdcan -> Init .RxFifo0ElmtsNbr , 64U ));
334+ assert_param (IS_FDCAN_MAX_VALUE (hfdcan -> Init .StdFiltersNbr , SRAMCAN_FLS_NBR ));
335+ assert_param (IS_FDCAN_MAX_VALUE (hfdcan -> Init .ExtFiltersNbr , SRAMCAN_FLE_NBR ));
336+ assert_param (IS_FDCAN_MAX_VALUE (hfdcan -> Init .RxFifo0ElmtsNbr , SRAMCAN_RF0_NBR ));
331337 if (hfdcan -> Init .RxFifo0ElmtsNbr > 0U )
332338 {
333339 assert_param (IS_FDCAN_DATA_SIZE (hfdcan -> Init .RxFifo0ElmtSize ));
334340 }
335- assert_param (IS_FDCAN_MAX_VALUE (hfdcan -> Init .RxFifo1ElmtsNbr , 64U ));
341+ assert_param (IS_FDCAN_MAX_VALUE (hfdcan -> Init .RxFifo1ElmtsNbr , SRAMCAN_RF1_NBR ));
336342 if (hfdcan -> Init .RxFifo1ElmtsNbr > 0U )
337343 {
338344 assert_param (IS_FDCAN_DATA_SIZE (hfdcan -> Init .RxFifo1ElmtSize ));
339345 }
340- assert_param (IS_FDCAN_MAX_VALUE (hfdcan -> Init .RxBuffersNbr , 64U ));
346+ assert_param (IS_FDCAN_MAX_VALUE (hfdcan -> Init .RxBuffersNbr , SRAMCAN_RB_NBR ));
341347 if (hfdcan -> Init .RxBuffersNbr > 0U )
342348 {
343349 assert_param (IS_FDCAN_DATA_SIZE (hfdcan -> Init .RxBufferSize ));
344350 }
345- assert_param (IS_FDCAN_MAX_VALUE (hfdcan -> Init .TxEventsNbr , 32U ));
346- assert_param (IS_FDCAN_MAX_VALUE ((hfdcan -> Init .TxBuffersNbr + hfdcan -> Init .TxFifoQueueElmtsNbr ), 32U ));
351+ assert_param (IS_FDCAN_MAX_VALUE (hfdcan -> Init .TxEventsNbr , SRAMCAN_TEF_NBR ));
352+ assert_param (IS_FDCAN_MAX_VALUE ((hfdcan -> Init .TxBuffersNbr + hfdcan -> Init .TxFifoQueueElmtsNbr ), SRAMCAN_TFQ_NBR ));
347353 if (hfdcan -> Init .TxFifoQueueElmtsNbr > 0U )
348354 {
349355 assert_param (IS_FDCAN_TX_FIFO_QUEUE_MODE (hfdcan -> Init .TxFifoQueueMode ));
@@ -585,7 +591,7 @@ HAL_StatusTypeDef HAL_FDCAN_Init(FDCAN_HandleTypeDef *hfdcan)
585591 hfdcan -> State = HAL_FDCAN_STATE_READY ;
586592
587593 /* Calculate each RAM block address */
588- status = FDCAN_CalcultateRamBlockAddresses (hfdcan );
594+ status = FDCAN_CalculateRamBlockAddresses (hfdcan );
589595
590596 /* Return function status */
591597 return status ;
@@ -1845,14 +1851,14 @@ HAL_StatusTypeDef HAL_FDCAN_ConfigFilter(FDCAN_HandleTypeDef *hfdcan, const FDCA
18451851 assert_param (IS_FDCAN_FILTER_CFG (sFilterConfig -> FilterConfig ));
18461852 if (sFilterConfig -> FilterConfig == FDCAN_FILTER_TO_RXBUFFER )
18471853 {
1848- assert_param (IS_FDCAN_MAX_VALUE (sFilterConfig -> RxBufferIndex , 63U ));
1854+ assert_param (IS_FDCAN_MAX_VALUE (sFilterConfig -> RxBufferIndex , ( SRAMCAN_RB_NBR - 1U ) ));
18491855 assert_param (IS_FDCAN_MAX_VALUE (sFilterConfig -> IsCalibrationMsg , 1U ));
18501856 }
18511857
18521858 if (sFilterConfig -> IdType == FDCAN_STANDARD_ID )
18531859 {
18541860 /* Check function parameters */
1855- assert_param (IS_FDCAN_MAX_VALUE (sFilterConfig -> FilterIndex , ( hfdcan -> Init .StdFiltersNbr - 1U ) ));
1861+ assert_param (IS_FDCAN_MAX_VALUE (( sFilterConfig -> FilterIndex + 1U ), hfdcan -> Init .StdFiltersNbr ));
18561862 assert_param (IS_FDCAN_MAX_VALUE (sFilterConfig -> FilterID1 , 0x7FFU ));
18571863 if (sFilterConfig -> FilterConfig != FDCAN_FILTER_TO_RXBUFFER )
18581864 {
@@ -3316,7 +3322,7 @@ HAL_StatusTypeDef HAL_FDCAN_GetErrorCounters(const FDCAN_HandleTypeDef *hfdcan,
33163322uint32_t HAL_FDCAN_IsRxBufferMessageAvailable (FDCAN_HandleTypeDef * hfdcan , uint32_t RxBufferIndex )
33173323{
33183324 /* Check function parameters */
3319- assert_param (IS_FDCAN_MAX_VALUE (RxBufferIndex , 63U ));
3325+ assert_param (IS_FDCAN_MAX_VALUE (RxBufferIndex , ( SRAMCAN_RB_NBR - 1U ) ));
33203326 uint32_t NewData1 = hfdcan -> Instance -> NDAT1 ;
33213327 uint32_t NewData2 = hfdcan -> Instance -> NDAT2 ;
33223328
@@ -6090,7 +6096,7 @@ uint32_t HAL_FDCAN_GetError(const FDCAN_HandleTypeDef *hfdcan)
60906096 * the configuration information for the specified FDCAN.
60916097 * @retval HAL status
60926098 */
6093- static HAL_StatusTypeDef FDCAN_CalcultateRamBlockAddresses (FDCAN_HandleTypeDef * hfdcan )
6099+ static HAL_StatusTypeDef FDCAN_CalculateRamBlockAddresses (FDCAN_HandleTypeDef * hfdcan )
60946100{
60956101 uint32_t RAMcounter ;
60966102 uint32_t StartAddress ;
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