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Revert "[X86] Invert (and X, ~(and ~Y, Z)) back into (and X, (or Y, ~Z)) (llvm#109215)"
This reverts commit 6fd229a.
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llvm/lib/Target/X86/X86ISelLowering.cpp

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@@ -50035,28 +50035,6 @@ static bool hasBZHI(const X86Subtarget &Subtarget, MVT VT) {
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(VT == MVT::i32 || (VT == MVT::i64 && Subtarget.is64Bit()));
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}
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/// Folds (and X, (or Y, ~Z)) --> (and X, ~(and ~Y, Z))
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/// This undoes the inverse fold performed in InstCombine
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static SDValue combineAndNotOrIntoAndNotAnd(SDNode *N, SelectionDAG &DAG) {
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using namespace llvm::SDPatternMatch;
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MVT VT = N->getSimpleValueType(0);
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SDLoc DL(N);
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const TargetLowering &TLI = DAG.getTargetLoweringInfo();
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if (!TLI.hasAndNot(SDValue(N, 0)))
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return SDValue();
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SDValue X, Y, Z;
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if (sd_match(
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N, m_And(m_Value(X), m_OneUse(m_Or(m_Value(Y), m_Not(m_Value(Z)))))))
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return DAG.getNode(
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ISD::AND, DL, VT, X,
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DAG.getNOT(DL, DAG.getNode(ISD::AND, DL, VT, DAG.getNOT(DL, Y, VT), Z),
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VT));
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return SDValue();
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}
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// This function recognizes cases where X86 bzhi instruction can replace and
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// 'and-load' sequence.
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// In case of loading integer value from an array of constants which is defined
@@ -50548,9 +50526,6 @@ static SDValue combineAnd(SDNode *N, SelectionDAG &DAG,
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if (SDValue R = combineAndLoadToBZHI(N, DAG, Subtarget))
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return R;
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if (SDValue R = combineAndNotOrIntoAndNotAnd(N, DAG))
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return R;
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// fold (and (mul x, c1), c2) -> (mul x, (and c1, c2))
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// iff c2 is all/no bits mask - i.e. a select-with-zero mask.
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// TODO: Handle PMULDQ/PMULUDQ/VPMADDWD/VPMADDUBSW?

llvm/test/CodeGen/X86/pr108731.ll

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