register var after time zero

[yanghao]

It seems pyvcd does not allow register var after time zero:

  File "/usr/local/lib/python3.8/dist-packages/vcd/writer.py", line 214, in register_var
    raise VCDPhaseError('Cannot register after time 0.')
vcd.writer.VCDPhaseError: Cannot register after time 0.

Is this is VCD file format limitation or a pyvcd implementation limitation?

Thanks.

[jpgrayson]

This is a VCD file format limitation, mostly.

In the VCD file, all of the variables are declared in a header section that precedes the value change section. Pyvcd accumulates variable registrations in-memory, and then flushes to the output stream in response to the first value change. Since pyvcd writes the VCD output in a single pass, it is not possible register a new variable after the first time/value change.

One could imagine a different VCD writing strategy where the variable registrations and value changes were buffered to temporary streams (temp files) and then joined into the final VCD stream at close time. I think it would be possible to add new variables on-the-fly with this kind of multi-stream output strategy. However, variables would still need to be added before the time of their first value change in this kind of system.

My instinct is to not try to support this kind of multi-stream / multi-pass writing strategy in pyvcd. I think I would need to be convinced with code that it could be done without over-complicating the library.

[yanghao]

Thanks for the information.

After reviewing the VCD format spec, I think the limitation is in pyvcd implementation as you described. Specifically, the limitation is we do not want to use more than one streams to write both VCD header and the actual value dumps.

I think the easiest way is to split header and content. The header can be safely buffered in memory and then write to disk as a whole, the content part will need to gradually writing to disk as it tends to grow pretty large. And finally combine those two into a new file. But of course when the file is really big, this will cost twice as much space temporarily, and cost time to combine header and content.

Do you know if any other value dump format would support a split header and content? Thanks.

[jpgrayson]

It might be worth reviewing the characteristics of the LXT and FST dump formats supported by GTKWave. Details are in the GTKWave manual: http://gtkwave.sourceforge.net/gtkwave.pdf. I don't know how amenable either of these formats are to adding variables on-the-fly.

Out of curiosity, what is your use case for wanting to register variables after starting to emit value changes?

[yanghao]

Thanks @jpgrayson , I will take a look.

The use case is ... think about Verilog or VHDL, but instead of creating all module instances and signals at elaboration time, you can create module instances and signals at ANY time.