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Merge pull request #2180 from SciML/myb/op
More generic and robust discrete subsystem handling
2 parents 2ecda0b + 641f293 commit 59f7f7d

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2 files changed

+13
-4
lines changed

2 files changed

+13
-4
lines changed

src/systems/abstractsystem.jl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1373,7 +1373,7 @@ function linearize_symbolic(sys::AbstractSystem, inputs,
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end
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function markio!(state, orig_inputs, inputs, outputs; check = true)
1376-
fullvars = state.fullvars
1376+
fullvars = get_fullvars(state)
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inputset = Dict{Any, Bool}(i => false for i in inputs)
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outputset = Dict{Any, Bool}(o => false for o in outputs)
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for (i, v) in enumerate(fullvars)

src/systems/clock_inference.jl

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ end
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function infer_clocks!(ci::ClockInference)
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@unpack ts, eq_domain, var_domain, inferred = ci
26-
@unpack graph = ts.structure
26+
@unpack var_to_diff, graph = ts.structure
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fullvars = get_fullvars(ts)
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isempty(inferred) && return ci
2929
# TODO: add a graph type to do this lazily
@@ -37,6 +37,11 @@ function infer_clocks!(ci::ClockInference)
3737
end
3838
end
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end
40+
for v in vertices(var_to_diff)
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if (v′ = var_to_diff[v]) !== nothing
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add_edge!(var_graph, v, v′)
43+
end
44+
end
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cc = connected_components(var_graph)
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for c′ in cc
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c = BitSet(c′)
@@ -75,6 +80,11 @@ function resize_or_push!(v, val, idx)
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push!(v[idx], val)
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end
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83+
function is_time_domain_conversion(v)
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istree(v) && (o = operation(v)) isa Operator &&
85+
input_timedomain(o) != output_timedomain(o)
86+
end
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function split_system(ci::ClockInference{S}) where {S}
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@unpack ts, eq_domain, var_domain, inferred = ci
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fullvars = get_fullvars(ts)
@@ -113,8 +123,7 @@ function split_system(ci::ClockInference{S}) where {S}
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@assert cid!==0 "Internal error! Variable $(fullvars[i]) doesn't have a inferred time domain."
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var_to_cid[i] = cid
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v = fullvars[i]
116-
if istree(v) && (o = operation(v)) isa Operator &&
117-
input_timedomain(o) != output_timedomain(o)
126+
if is_time_domain_conversion(v)
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push!(input_idxs[cid], i)
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push!(inputs[cid], fullvars[i])
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end

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