@@ -32,7 +32,7 @@ const FMU_DIR = joinpath(@__DIR__, "fmus")
3232    @testset  " v2, CS" begin 
3333        fmu =  loadFMU (" SpringPendulum1D" " Dymola" " 2022x" =  :CS )
3434        @named  inner =  MTK. FMIComponent (
35-             Val (2 ); fmu, communication_step_size =  0.001 , type =  :CS )
35+             Val (2 ); fmu, communication_step_size =  1e-5 , type =  :CS )
3636        @variables  x (t) =  1.0 
3737        @mtkbuild  sys =  ODESystem ([D (x) ~  x], t; systems =  [inner])
3838        test_no_inputs_outputs (sys)
@@ -66,7 +66,7 @@ const FMU_DIR = joinpath(@__DIR__, "fmus")
6666    @testset  " v3, CS" begin 
6767        fmu =  loadFMU (" SpringPendulum1D" " Dymola" " 2023x" " 3.0" =  :CS )
6868        @named  inner =  MTK. FMIComponent (
69-             Val (3 ); fmu, communication_step_size =  0.001 , type =  :CS )
69+             Val (3 ); fmu, communication_step_size =  1e-5 , type =  :CS )
7070        @variables  x (t) =  1.0 
7171        @mtkbuild  sys =  ODESystem ([D (x) ~  x], t; systems =  [inner])
7272        test_no_inputs_outputs (sys)
210210    @testset  " v3, CS" begin 
211211        fmu =  loadFMU (joinpath (FMU_DIR, " StateSpace.fmu" =  :CS )
212212        @named  sspace =  MTK. FMIComponent (
213-             Val (3 ); fmu, communication_step_size =  1e-4  , type =  :CS ,
213+             Val (3 ); fmu, communication_step_size =  1e-6  , type =  :CS ,
214214            reinitializealg =  BrownFullBasicInit ())
215215        @test  MTK. isinput (sspace. u)
216216        @test  MTK. isoutput (sspace. y)
259259    @testset  " v2, CS" begin 
260260        fmu =  loadFMU (joinpath (FMU_DIR, " SimpleAdder.fmu" =  :CS )
261261        @named  adder1 =  MTK. FMIComponent (
262-             Val (2 ); fmu, type =  :CS , communication_step_size =  1e-3  )
262+             Val (2 ); fmu, type =  :CS , communication_step_size =  1e-5  )
263263        @named  adder2 =  MTK. FMIComponent (
264-             Val (2 ); fmu, type =  :CS , communication_step_size =  1e-3  )
264+             Val (2 ); fmu, type =  :CS , communication_step_size =  1e-5  )
265265        sys, prob =  build_looped_adders (adder1, adder2)
266266        sol =  solve (prob,
267267            Tsit5 ();
300300    @testset  " v3, CS" begin 
301301        fmu =  loadFMU (joinpath (FMU_DIR, " StateSpace.fmu" =  :CS )
302302        @named  sspace1 =  MTK. FMIComponent (
303-             Val (3 ); fmu, type =  :CS , communication_step_size =  1e-4  )
303+             Val (3 ); fmu, type =  :CS , communication_step_size =  1e-5  )
304304        @named  sspace2 =  MTK. FMIComponent (
305-             Val (3 ); fmu, type =  :CS , communication_step_size =  1e-4  )
305+             Val (3 ); fmu, type =  :CS , communication_step_size =  1e-5  )
306306        sys, prob =  build_looped_sspace (sspace1, sspace2)
307307        sol =  solve (prob, Rodas5P (autodiff =  false ); reltol =  1e-8 )
308308        @test  SciMLBase. successful_retcode (sol)
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