diff --git a/src/Electrical/Analog/sources.jl b/src/Electrical/Analog/sources.jl
index 807fa91f..3cc9860c 100644
--- a/src/Electrical/Analog/sources.jl
+++ b/src/Electrical/Analog/sources.jl
@@ -23,6 +23,34 @@ See [OnePort](@ref)
     end
 end
 
+"""
+    ConstantVoltage(; name, V)
+
+Acts as an ideal constant voltage source with no internal resistance.
+
+# States:
+
+See [OnePort](@ref)
+
+# Connectors:
+
+  - `p` Positive pin
+  - `n` Negative pin
+
+# Parameters:
+
+  - `V`: [`V`] Constant voltage value
+"""
+@mtkmodel ConstantVoltage begin
+    @extend v, i = oneport = OnePort()
+    @parameters begin
+        V, [description = "Constant voltage value"]
+    end
+    @equations begin
+        v ~ V
+    end
+end
+
 """
     Current(; name)
 
@@ -47,3 +75,31 @@ See [OnePort](@ref)
         i ~ I.u
     end
 end
+
+"""
+    ConstantCurrent(; name, I)
+
+Acts as an ideal constant current source with no internal resistance.
+
+# States:
+
+See [OnePort](@ref)
+
+# Connectors:
+
+  - `p` Positive pin
+  - `n` Negative pin
+
+# Parameters:
+
+  - `I`: [`A`] Constant current value
+"""
+@mtkmodel ConstantCurrent begin
+    @extend v, i = oneport = OnePort()
+    @parameters begin
+        I, [description = "Constant current value"]
+    end
+    @equations begin
+        i ~ I
+    end
+end
diff --git a/src/Electrical/Electrical.jl b/src/Electrical/Electrical.jl
index 68ba19ce..0c5ec45c 100644
--- a/src/Electrical/Electrical.jl
+++ b/src/Electrical/Electrical.jl
@@ -21,7 +21,7 @@ include("Analog/ideal_components.jl")
 export CurrentSensor, PotentialSensor, VoltageSensor, PowerSensor, MultiSensor
 include("Analog/sensors.jl")
 
-export Voltage, Current
+export Voltage, ConstantVoltage, Current, ConstantCurrent
 include("Analog/sources.jl")
 
 # include("Digital/gates.jl")
diff --git a/test/Electrical/analog.jl b/test/Electrical/analog.jl
index 0cc0d299..fd9517e2 100644
--- a/test/Electrical/analog.jl
+++ b/test/Electrical/analog.jl
@@ -108,6 +108,28 @@ end
     @test sol[capacitor.v][end]≈10 atol=1e-3
 end
 
+# simple RC with constant voltage source
+@testset "RC with constant voltage source" begin
+    @named voltage = ConstantVoltage(V = 10)
+    @named resistor = Resistor(R = 1)
+    @named capacitor = Capacitor(C = 1, v = 0.0)
+    @named ground = Ground()
+
+    connections = [connect(voltage.p, resistor.p)
+                   connect(resistor.n, capacitor.p)
+                   connect(capacitor.n, voltage.n, ground.g)]
+
+    @named model = ODESystem(connections, t;
+        systems = [resistor, capacitor, voltage, ground])
+    sys = structural_simplify(model)
+    prob = ODEProblem(sys, Pair[], (0.0, 10.0))
+    sol = solve(prob, Tsit5())
+
+    # Plots.plot(sol; vars=[source.v, capacitor.v])
+    @test SciMLBase.successful_retcode(sol)
+    @test sol[capacitor.v][end]≈10 atol=1e-3
+end
+
 # simple RL
 @testset "RL" begin
     @named source = Constant(k = 10)
@@ -193,6 +215,27 @@ end
     @test sum(reduce(vcat, sol[capacitor.v]) .- y(sol.t, start_time))≈0 atol=1e-2
 end
 
+# RC with constant current source
+@testset "RC with constant current source" begin
+    @named current = ConstantCurrent(I = 1)
+    @named resistor = Resistor(R = 1)
+    @named capacitor = Capacitor(C = 1, v = 0.0)
+    @named ground = Ground()
+
+    connections = [connect(current.p, resistor.n)
+                   connect(capacitor.n, resistor.p)
+                   connect(capacitor.p, current.n, ground.g)]
+
+    @named model = ODESystem(connections, t;
+        systems = [ground, resistor, current, capacitor])
+    sys = structural_simplify(model)
+    prob = ODEProblem(sys, Pair[], (0.0, 10.0))
+    sol = solve(prob, Tsit5())
+    y(x, st) = (x .> st) .* abs.(collect(x) .- st)
+    @test SciMLBase.successful_retcode(sol)
+    @test sum(reduce(vcat, sol[capacitor.v]) .- y(sol.t, 0.0))≈0 atol=1e-2
+end
+
 @testset "Integrator" begin
     R = 1e3
     f = 1