From c10944898e9b046ecd00df8a13f707f938954409 Mon Sep 17 00:00:00 2001 From: matthew-kapp Date: Wed, 9 Apr 2025 11:12:47 +0200 Subject: [PATCH 1/3] ConstantVoltage added and tested --- src/Electrical/Analog/sources.jl | 28 ++++++++++++++++++++++++++++ src/Electrical/Electrical.jl | 2 +- test/Electrical/analog.jl | 22 ++++++++++++++++++++++ 3 files changed, 51 insertions(+), 1 deletion(-) diff --git a/src/Electrical/Analog/sources.jl b/src/Electrical/Analog/sources.jl index 807fa91f1..5fef06e91 100644 --- a/src/Electrical/Analog/sources.jl +++ b/src/Electrical/Analog/sources.jl @@ -23,6 +23,34 @@ See [OnePort](@ref) end end +""" + ConstantVoltage(; name) + +Acts as an ideal constant voltage source with no internal resistance. + +# States: + +See [OnePort](@ref) + +# Connectors: + + - `p` Positive pin + - `n` Negative pin + +# Parameters: + + - `V`: [`V`] Constant voltage value +""" +@mtkmodel ConstantVoltage begin + @extend v, i = oneport = OnePort() + @parameters begin + V, [description = "Constant voltage value"] + end + @equations begin + v ~ V + end +end + """ Current(; name) diff --git a/src/Electrical/Electrical.jl b/src/Electrical/Electrical.jl index 68ba19cea..9a2fe2b5e 100644 --- a/src/Electrical/Electrical.jl +++ b/src/Electrical/Electrical.jl @@ -21,7 +21,7 @@ include("Analog/ideal_components.jl") export CurrentSensor, PotentialSensor, VoltageSensor, PowerSensor, MultiSensor include("Analog/sensors.jl") -export Voltage, Current +export Voltage, ConstantVoltage, Current include("Analog/sources.jl") # include("Digital/gates.jl") diff --git a/test/Electrical/analog.jl b/test/Electrical/analog.jl index 0cc0d299f..dc21bfafd 100644 --- a/test/Electrical/analog.jl +++ b/test/Electrical/analog.jl @@ -108,6 +108,28 @@ end @test sol[capacitor.v][end]≈10 atol=1e-3 end +# simple RC with constant voltage source +@testset "RC with constant voltage source" begin + @named voltage = ConstantVoltage(V = 10) + @named resistor = Resistor(R = 1) + @named capacitor = Capacitor(C = 1, v = 0.0) + @named ground = Ground() + + connections = [connect(voltage.p, resistor.p) + connect(resistor.n, capacitor.p) + connect(capacitor.n, voltage.n, ground.g)] + + @named model = ODESystem(connections, t; + systems = [resistor, capacitor, voltage, ground]) + sys = structural_simplify(model) + prob = ODEProblem(sys, Pair[], (0.0, 10.0)) + sol = solve(prob, Tsit5()) + + # Plots.plot(sol; vars=[source.v, capacitor.v]) + @test SciMLBase.successful_retcode(sol) + @test sol[capacitor.v][end]≈10 atol=1e-3 +end + # simple RL @testset "RL" begin @named source = Constant(k = 10) From 1873f93bca27cc51726448e178dc9f6e10150609 Mon Sep 17 00:00:00 2001 From: matthew-kapp Date: Wed, 9 Apr 2025 11:35:56 +0200 Subject: [PATCH 2/3] ConstantCurrent added and tested --- src/Electrical/Analog/sources.jl | 30 +++++++++++++++++++++++++++++- src/Electrical/Electrical.jl | 2 +- test/Electrical/analog.jl | 21 +++++++++++++++++++++ 3 files changed, 51 insertions(+), 2 deletions(-) diff --git a/src/Electrical/Analog/sources.jl b/src/Electrical/Analog/sources.jl index 5fef06e91..17543ba53 100644 --- a/src/Electrical/Analog/sources.jl +++ b/src/Electrical/Analog/sources.jl @@ -24,7 +24,7 @@ See [OnePort](@ref) end """ - ConstantVoltage(; name) + ConstantVoltage(; name, V) Acts as an ideal constant voltage source with no internal resistance. @@ -75,3 +75,31 @@ See [OnePort](@ref) i ~ I.u end end + +""" + ConstantCurrent(; name, I) + +Acts as an ideal constant current source with no internal resistance. + +# States: + +See [OnePort](@ref) + +# Connectors: + + - `p` Positive pin + - `n` Negative pin + +# Parameters: + + - `I`: [`A`] Constant current value +""" +@mtkmodel ConstantCurrent begin + @extend v, i = oneport = OnePort() + @parameters begin + I, [description = "Constant current value"] + end + @equations begin + i ~ I + end +end \ No newline at end of file diff --git a/src/Electrical/Electrical.jl b/src/Electrical/Electrical.jl index 9a2fe2b5e..0c5ec45cf 100644 --- a/src/Electrical/Electrical.jl +++ b/src/Electrical/Electrical.jl @@ -21,7 +21,7 @@ include("Analog/ideal_components.jl") export CurrentSensor, PotentialSensor, VoltageSensor, PowerSensor, MultiSensor include("Analog/sensors.jl") -export Voltage, ConstantVoltage, Current +export Voltage, ConstantVoltage, Current, ConstantCurrent include("Analog/sources.jl") # include("Digital/gates.jl") diff --git a/test/Electrical/analog.jl b/test/Electrical/analog.jl index dc21bfafd..fd9517e2e 100644 --- a/test/Electrical/analog.jl +++ b/test/Electrical/analog.jl @@ -215,6 +215,27 @@ end @test sum(reduce(vcat, sol[capacitor.v]) .- y(sol.t, start_time))≈0 atol=1e-2 end +# RC with constant current source +@testset "RC with constant current source" begin + @named current = ConstantCurrent(I = 1) + @named resistor = Resistor(R = 1) + @named capacitor = Capacitor(C = 1, v = 0.0) + @named ground = Ground() + + connections = [connect(current.p, resistor.n) + connect(capacitor.n, resistor.p) + connect(capacitor.p, current.n, ground.g)] + + @named model = ODESystem(connections, t; + systems = [ground, resistor, current, capacitor]) + sys = structural_simplify(model) + prob = ODEProblem(sys, Pair[], (0.0, 10.0)) + sol = solve(prob, Tsit5()) + y(x, st) = (x .> st) .* abs.(collect(x) .- st) + @test SciMLBase.successful_retcode(sol) + @test sum(reduce(vcat, sol[capacitor.v]) .- y(sol.t, 0.0))≈0 atol=1e-2 +end + @testset "Integrator" begin R = 1e3 f = 1 From 4110ef419e6174efa1b4a5b8c3172465539463dd Mon Sep 17 00:00:00 2001 From: matthew-kapp Date: Wed, 9 Apr 2025 11:55:35 +0200 Subject: [PATCH 3/3] JuliaFormatter applied --- src/Electrical/Analog/sources.jl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/Electrical/Analog/sources.jl b/src/Electrical/Analog/sources.jl index 17543ba53..3cc9860c2 100644 --- a/src/Electrical/Analog/sources.jl +++ b/src/Electrical/Analog/sources.jl @@ -102,4 +102,4 @@ See [OnePort](@ref) @equations begin i ~ I end -end \ No newline at end of file +end